Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_main__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	145582	1			T76	75		T77	52		T82	5
values[2]	4074	1			T76	6		T250	62		T415	2
values[3]	1761	1			T250	38		T450	13		T664	46
values[4]	1239	1			T250	39		T450	8		T664	13
values[5]	1043	1			T250	35		T450	3		T696	32
values[6]	903	1			T250	29		T450	2		T696	22
values[7]	737	1			T250	16		T450	4		T696	22
values[8]	673	1			T250	18		T450	3		T696	22
values[9]	619	1			T250	16		T450	6		T696	22
values[10]	607	1			T250	22		T450	10		T696	27
values[11]	583	1			T250	20		T450	3		T696	33
values[12]	512	1			T250	33		T450	6		T696	32
values[13]	518	1			T250	35		T450	21		T696	32
values[14]	616	1			T250	52		T450	22		T696	30
values[15]	571	1			T250	32		T450	8		T696	34
values[16]	520	1			T250	29		T450	2		T696	30
values[17]	504	1			T250	25		T450	4		T696	27
values[18]	428	1			T250	9		T450	4		T696	10
values[19]	393	1			T250	2		T450	1		T696	5
values[20]	323	1			T450	4		T597	18		T460	2
values[21]	343	1			T450	13		T597	18		T460	2
values[22]	296	1			T450	19		T597	11		T460	2
values[23]	252	1			T450	18		T597	5		T460	2
values[24]	240	1			T450	8		T460	2		T658	7
values[25]	245	1			T450	25		T460	2		T658	6
values[26]	244	1			T450	24		T460	2		T658	3
values[27]	219	1			T450	7		T460	2		T658	3
values[28]	205	1			T450	7		T460	2		T852	1
values[29]	199	1			T450	7		T460	2		T852	1
values[30]	152	1			T450	4		T460	2		T852	1
values[31]	115	1			T450	3		T460	2		T852	1
values[32]	108	1			T450	1		T460	2		T852	1
values[33]	111	1			T460	2		T852	1		T862	6
values[34]	121	1			T460	2		T852	1		T862	4
values[35]	118	1			T460	2		T852	1		T862	2
values[36]	97	1			T460	3		T852	1		T862	2
values[37]	125	1			T460	2		T852	1		T862	3
values[38]	130	1			T460	2		T852	1		T862	6
values[39]	103	1			T460	2		T852	1		T862	5
values[40]	104	1			T460	2		T852	1		T862	2
values[41]	99	1			T460	2		T852	1		T862	6
values[42]	107	1			T460	2		T852	1		T862	5
values[43]	98	1			T460	2		T852	1		T862	3
values[44]	132	1			T460	2		T852	1		T862	2
values[45]	144	1			T460	2		T852	1		T862	1
values[46]	125	1			T460	2		T852	1		T862	3
values[47]	96	1			T460	2		T852	1		T862	1
values[48]	83	1			T460	2		T852	1		T862	1
values[49]	81	1			T460	2		T852	1		T862	3
values[50]	92	1			T460	2		T852	1		T862	3
values[51]	92	1			T460	2		T852	1		T862	4
values[52]	96	1			T460	2		T852	1		T862	4
values[53]	92	1			T460	2		T852	1		T862	2
values[54]	82	1			T460	2		T852	1		T862	4
values[55]	70	1			T460	2		T852	1		T862	8
values[56]	66	1			T460	2		T852	1		T862	6
values[57]	63	1			T460	2		T852	1		T862	3
values[58]	52	1			T460	2		T852	1		T862	3
values[59]	52	1			T460	2		T852	1		T862	3
values[60]	49	1			T460	2		T852	1		T862	1
values[61]	54	1			T460	2		T852	1		T862	2
values[62]	50	1			T460	2		T852	1		T862	3
values[63]	56	1			T460	2		T852	1		T862	1
values[64]	54	1			T460	2		T852	1		T862	1
values[65]	55	1			T460	2		T852	1		T862	3
values[66]	46	1			T460	2		T852	1		T862	1
values[67]	58	1			T460	2		T852	1		T862	3
values[68]	54	1			T460	2		T852	1		T862	2
values[69]	54	1			T460	2		T852	1		T862	1
values[70]	64	1			T460	2		T852	1		T862	1
values[71]	61	1			T460	2		T852	1		T862	1
values[72]	47	1			T460	2		T852	1		T862	2
values[73]	60	1			T460	2		T852	1		T862	2
values[74]	59	1			T460	2		T852	1		T862	2
values[75]	58	1			T460	2		T852	1		T862	1
values[76]	52	1			T460	2		T852	2		T862	1
values[77]	72	1			T460	2		T852	1		T862	4
values[78]	67	1			T460	2		T852	1		T862	3
values[79]	57	1			T460	2		T852	1		T862	1
values[80]	82	1			T460	2		T852	1		T862	1
values[81]	93	1			T460	2		T852	1		T862	7
values[82]	78	1			T460	2		T852	1		T862	6
values[83]	81	1			T460	5		T852	1		T862	7
values[84]	71	1			T460	3		T852	1		T862	4
values[85]	76	1			T460	3		T852	1		T862	3
values[86]	68	1			T460	2		T852	1		T862	8
values[87]	72	1			T460	2		T852	1		T862	4
values[88]	74	1			T460	3		T852	1		T862	6
values[89]	89	1			T460	2		T852	1		T862	6
values[90]	73	1			T460	5		T852	1		T862	3
values[91]	84	1			T460	3		T852	1		T862	13
values[92]	74	1			T460	5		T852	1		T862	4
values[93]	71	1			T460	3		T852	1		T862	5
values[94]	70	1			T460	4		T852	1		T862	6
values[95]	83	1			T460	2		T852	2		T862	3
values[96]	85	1			T460	3		T852	3		T862	1
values[97]	79	1			T460	3		T852	6		T862	3
values[98]	103	1			T460	6		T852	11		T862	11
values[99]	90	1			T460	2		T852	2		T862	6
values[100]	83	1			T460	3		T852	4		T862	8
values[101]	85	1			T460	5		T852	3		T862	5
values[102]	89	1			T460	2		T852	1		T862	8
values[103]	80	1			T460	3		T852	2		T862	6
values[104]	68	1			T460	2		T852	1		T862	4
values[105]	80	1			T460	2		T852	2		T862	5
values[106]	95	1			T460	3		T852	1		T862	3
values[107]	87	1			T460	7		T852	2		T862	2
values[108]	80	1			T460	3		T852	5		T862	5
values[109]	96	1			T460	3		T852	4		T862	8
values[110]	90	1			T460	2		T852	3		T862	3
values[111]	108	1			T460	2		T852	1		T862	4
values[112]	89	1			T460	2		T852	2		T862	4
values[113]	102	1			T460	4		T852	2		T862	13
values[114]	110	1			T460	3		T852	4		T862	8
values[115]	113	1			T460	5		T852	1		T862	4
values[116]	107	1			T460	4		T852	2		T862	3
values[117]	121	1			T460	3		T852	4		T862	7
values[118]	141	1			T460	4		T852	2		T862	4
values[119]	148	1			T460	3		T852	4		T862	5
values[120]	107	1			T460	4		T852	1		T862	2
values[121]	98	1			T460	3		T852	1		T862	9
values[122]	100	1			T460	2		T852	5		T862	5
values[123]	128	1			T460	4		T852	1		T862	8
values[124]	178	1			T460	4		T852	1		T862	9
values[125]	336	1			T460	6		T852	2		T862	11
values[126]	703	1			T460	35		T852	7		T862	9
values[127]	2921	1			T460	261		T852	97		T862	11
values[128]	4948	1			T460	412		T852	213		T862	1