Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	131076	1			T76	93		T77	36		T82	5
values[2]	8913	1			T76	9		T77	1		T250	2
values[3]	3711	1			T429	22		T588	1		T428	1
values[4]	2246	1			T429	22		T428	1		T845	108
values[5]	1484	1			T429	5		T428	1		T845	67
values[6]	922	1			T429	2		T428	1		T845	32
values[7]	628	1			T428	1		T845	10		T855	1
values[8]	490	1			T428	1		T845	3		T855	1
values[9]	405	1			T428	1		T845	10		T855	2
values[10]	321	1			T428	1		T845	6		T855	5
values[11]	312	1			T428	1		T845	2		T855	1
values[12]	273	1			T428	1		T845	5		T855	2
values[13]	264	1			T428	1		T845	2		T855	9
values[14]	229	1			T428	1		T855	16		T860	1
values[15]	207	1			T428	1		T855	10		T860	1
values[16]	243	1			T428	1		T855	8		T860	1
values[17]	253	1			T428	1		T855	9		T860	1
values[18]	192	1			T428	1		T855	3		T860	1
values[19]	196	1			T428	1		T855	2		T860	1
values[20]	206	1			T428	1		T855	3		T860	1
values[21]	223	1			T428	1		T855	2		T860	1
values[22]	205	1			T428	1		T855	3		T860	1
values[23]	206	1			T428	1		T855	6		T860	1
values[24]	172	1			T428	1		T855	4		T860	1
values[25]	160	1			T428	1		T855	5		T860	1
values[26]	212	1			T428	1		T855	11		T860	1
values[27]	172	1			T428	1		T855	2		T860	1
values[28]	163	1			T428	1		T855	1		T860	1
values[29]	197	1			T428	1		T855	6		T860	1
values[30]	208	1			T428	1		T855	3		T860	1
values[31]	192	1			T428	1		T855	1		T860	1
values[32]	240	1			T428	1		T855	4		T860	1
values[33]	199	1			T428	1		T855	4		T860	1
values[34]	209	1			T428	1		T855	22		T860	1
values[35]	162	1			T428	1		T855	11		T860	1
values[36]	187	1			T428	1		T855	12		T860	1
values[37]	187	1			T428	1		T855	4		T860	1
values[38]	157	1			T428	1		T855	2		T860	1
values[39]	158	1			T428	1		T855	1		T860	1
values[40]	159	1			T428	1		T855	3		T860	1
values[41]	162	1			T428	1		T855	1		T860	1
values[42]	163	1			T428	1		T855	2		T860	1
values[43]	147	1			T428	1		T855	1		T860	1
values[44]	171	1			T428	1		T855	1		T860	1
values[45]	140	1			T428	1		T855	4		T860	1
values[46]	166	1			T428	1		T855	4		T860	1
values[47]	194	1			T428	1		T855	5		T860	1
values[48]	184	1			T428	1		T855	3		T860	1
values[49]	145	1			T428	1		T855	3		T860	1
values[50]	185	1			T428	1		T855	4		T860	1
values[51]	178	1			T428	1		T855	2		T860	1
values[52]	148	1			T428	1		T855	2		T860	1
values[53]	143	1			T428	1		T855	1		T860	1
values[54]	156	1			T428	1		T855	4		T860	1
values[55]	185	1			T428	1		T855	8		T860	1
values[56]	129	1			T428	1		T855	2		T860	1
values[57]	151	1			T428	1		T855	3		T860	1
values[58]	145	1			T428	1		T855	1		T860	1
values[59]	127	1			T428	1		T855	3		T860	1
values[60]	110	1			T428	1		T855	1		T860	1
values[61]	142	1			T428	1		T855	1		T860	1
values[62]	121	1			T428	1		T855	2		T860	1
values[63]	108	1			T428	1		T855	5		T860	1
values[64]	128	1			T428	1		T855	3		T860	1
values[65]	156	1			T428	1		T855	2		T860	1
values[66]	169	1			T428	1		T855	4		T860	1
values[67]	132	1			T428	1		T855	3		T860	1
values[68]	132	1			T428	1		T855	13		T860	1
values[69]	137	1			T428	1		T855	18		T860	1
values[70]	148	1			T428	2		T855	21		T860	1
values[71]	151	1			T428	1		T855	23		T860	1
values[72]	99	1			T428	1		T855	19		T860	1
values[73]	106	1			T428	1		T855	17		T860	1
values[74]	122	1			T428	1		T855	16		T860	1
values[75]	85	1			T428	1		T855	8		T860	1
values[76]	73	1			T428	1		T855	6		T860	1
values[77]	62	1			T428	1		T855	5		T860	1
values[78]	76	1			T428	1		T855	15		T860	1
values[79]	76	1			T428	1		T855	8		T860	1
values[80]	67	1			T428	1		T855	6		T860	1
values[81]	89	1			T428	1		T855	14		T860	1
values[82]	58	1			T428	1		T855	5		T860	1
values[83]	57	1			T428	1		T855	4		T860	1
values[84]	57	1			T428	1		T855	3		T860	1
values[85]	62	1			T428	1		T855	2		T860	1
values[86]	61	1			T428	1		T860	1		T863	1
values[87]	58	1			T428	1		T860	1		T863	1
values[88]	45	1			T428	1		T860	1		T863	2
values[89]	41	1			T428	1		T860	2		T863	1
values[90]	49	1			T428	1		T860	2		T863	1
values[91]	56	1			T428	1		T860	2		T863	1
values[92]	52	1			T428	1		T860	1		T863	1
values[93]	43	1			T428	1		T860	1		T863	1
values[94]	51	1			T428	1		T860	1		T863	1
values[95]	45	1			T428	1		T860	2		T863	1
values[96]	47	1			T428	1		T860	1		T863	1
values[97]	49	1			T428	1		T860	1		T863	1
values[98]	56	1			T428	1		T860	7		T863	1
values[99]	64	1			T428	1		T860	10		T863	1
values[100]	70	1			T428	1		T860	2		T863	1
values[101]	64	1			T428	1		T860	1		T863	1
values[102]	67	1			T428	1		T860	2		T863	1
values[103]	57	1			T428	2		T860	4		T863	1
values[104]	54	1			T428	1		T860	2		T863	1
values[105]	57	1			T428	2		T860	5		T863	1
values[106]	48	1			T428	1		T860	2		T863	1
values[107]	60	1			T428	4		T860	6		T863	3
values[108]	57	1			T428	1		T860	1		T863	3
values[109]	60	1			T428	3		T860	3		T863	4
values[110]	59	1			T428	3		T860	1		T863	1
values[111]	50	1			T428	4		T860	2		T863	1
values[112]	54	1			T428	2		T860	1		T863	6
values[113]	47	1			T428	3		T860	4		T863	4
values[114]	55	1			T428	2		T860	1		T863	1
values[115]	52	1			T428	1		T860	3		T863	4
values[116]	73	1			T428	2		T860	8		T863	1
values[117]	56	1			T428	6		T860	2		T863	1
values[118]	51	1			T428	2		T860	4		T863	1
values[119]	44	1			T428	4		T860	2		T863	1
values[120]	38	1			T428	2		T860	1		T863	1
values[121]	62	1			T428	2		T860	5		T863	1
values[122]	39	1			T428	1		T860	1		T863	1
values[123]	51	1			T428	1		T860	2		T863	1
values[124]	48	1			T428	1		T860	4		T863	3
values[125]	46	1			T428	2		T860	1		T863	1
values[126]	59	1			T428	2		T860	2		T863	6
values[127]	616	1			T428	46		T860	24		T863	32
values[128]	6276	1			T428	363		T860	265		T863	349