Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	134717	1			T76	99		T77	35		T82	6
values[2]	10964	1			T76	9		T250	1		T415	3
values[3]	4550	1			T76	1		T429	18		T450	6
values[4]	2763	1			T429	3		T450	6		T540	11
values[5]	1623	1			T429	5		T450	8		T540	3
values[6]	978	1			T429	3		T450	10		T540	3
values[7]	617	1			T450	6		T540	20		T664	16
values[8]	446	1			T450	3		T540	3		T664	9
values[9]	389	1			T450	6		T540	7		T664	1
values[10]	343	1			T450	1		T540	12		T696	14
values[11]	307	1			T450	2		T540	17		T696	5
values[12]	284	1			T450	6		T540	4		T696	4
values[13]	306	1			T450	3		T540	7		T696	10
values[14]	246	1			T450	3		T540	4		T696	12
values[15]	257	1			T450	2		T540	15		T696	2
values[16]	226	1			T450	5		T540	9		T696	2
values[17]	242	1			T450	6		T540	4		T696	5
values[18]	267	1			T450	4		T540	3		T696	5
values[19]	230	1			T450	5		T540	13		T696	4
values[20]	209	1			T450	4		T540	11		T696	3
values[21]	236	1			T450	9		T540	7		T696	2
values[22]	223	1			T450	5		T540	8		T696	7
values[23]	245	1			T450	6		T540	9		T696	11
values[24]	219	1			T450	15		T540	6		T696	8
values[25]	203	1			T450	7		T540	5		T696	3
values[26]	193	1			T450	2		T540	7		T696	6
values[27]	213	1			T450	4		T540	2		T696	7
values[28]	263	1			T450	2		T540	4		T696	5
values[29]	217	1			T450	2		T540	7		T696	7
values[30]	232	1			T450	6		T540	17		T696	5
values[31]	255	1			T450	5		T540	7		T696	3
values[32]	182	1			T450	7		T540	4		T696	2
values[33]	180	1			T450	1		T540	11		T696	3
values[34]	199	1			T450	2		T540	7		T696	7
values[35]	210	1			T450	2		T540	15		T696	4
values[36]	181	1			T450	3		T540	10		T696	4
values[37]	198	1			T450	5		T540	5		T696	2
values[38]	227	1			T450	5		T540	7		T696	8
values[39]	252	1			T450	5		T540	4		T696	8
values[40]	221	1			T450	2		T540	2		T696	5
values[41]	228	1			T450	1		T540	7		T696	5
values[42]	218	1			T450	1		T540	7		T696	7
values[43]	211	1			T450	3		T540	7		T696	3
values[44]	206	1			T450	3		T540	12		T696	2
values[45]	232	1			T450	1		T540	7		T696	6
values[46]	205	1			T450	4		T540	13		T696	4
values[47]	199	1			T450	3		T540	5		T696	4
values[48]	265	1			T450	2		T540	6		T696	5
values[49]	220	1			T450	3		T540	9		T696	7
values[50]	152	1			T450	2		T540	5		T696	7
values[51]	196	1			T450	13		T540	3		T696	9
values[52]	199	1			T450	5		T540	5		T696	5
values[53]	186	1			T450	4		T540	7		T696	6
values[54]	177	1			T450	5		T540	3		T696	7
values[55]	193	1			T450	7		T540	6		T696	2
values[56]	191	1			T450	7		T540	3		T696	5
values[57]	192	1			T450	3		T540	10		T696	6
values[58]	168	1			T450	5		T540	8		T696	4
values[59]	163	1			T450	2		T540	16		T696	6
values[60]	170	1			T450	3		T540	10		T696	7
values[61]	185	1			T450	3		T540	3		T696	5
values[62]	137	1			T450	7		T540	3		T696	9
values[63]	130	1			T450	3		T540	10		T696	9
values[64]	152	1			T450	4		T540	8		T696	9
values[65]	125	1			T450	4		T540	7		T696	5
values[66]	109	1			T450	2		T540	3		T696	6
values[67]	127	1			T450	8		T540	2		T696	11
values[68]	181	1			T450	19		T540	7		T696	11
values[69]	115	1			T450	5		T696	8		T713	1
values[70]	127	1			T450	6		T696	6		T713	1
values[71]	123	1			T450	7		T696	14		T713	1
values[72]	137	1			T450	4		T696	7		T713	1
values[73]	144	1			T450	8		T696	4		T713	1
values[74]	132	1			T450	15		T696	9		T713	1
values[75]	142	1			T450	12		T696	9		T713	1
values[76]	141	1			T450	3		T696	5		T713	1
values[77]	152	1			T450	14		T696	6		T713	1
values[78]	113	1			T450	16		T696	12		T713	1
values[79]	111	1			T450	14		T696	11		T713	1
values[80]	113	1			T450	5		T696	13		T713	1
values[81]	131	1			T450	3		T696	18		T713	1
values[82]	114	1			T450	12		T696	18		T713	1
values[83]	124	1			T450	13		T696	11		T713	1
values[84]	149	1			T450	16		T696	21		T713	1
values[85]	144	1			T450	12		T696	11		T713	2
values[86]	117	1			T450	10		T696	15		T713	1
values[87]	107	1			T450	10		T696	9		T713	1
values[88]	123	1			T450	8		T696	4		T713	1
values[89]	103	1			T450	4		T696	6		T713	1
values[90]	123	1			T696	8		T713	4		T836	1
values[91]	113	1			T696	7		T713	5		T836	2
values[92]	126	1			T696	7		T713	1		T836	1
values[93]	126	1			T696	13		T713	2		T836	1
values[94]	152	1			T696	12		T713	3		T836	1
values[95]	116	1			T696	4		T713	3		T836	4
values[96]	118	1			T696	7		T713	1		T836	9
values[97]	91	1			T696	7		T713	3		T836	2
values[98]	134	1			T696	10		T713	2		T836	1
values[99]	129	1			T696	6		T713	8		T836	2
values[100]	126	1			T696	1		T713	6		T836	5
values[101]	121	1			T696	6		T713	2		T836	3
values[102]	94	1			T696	8		T713	5		T836	2
values[103]	98	1			T696	8		T713	1		T836	1
values[104]	100	1			T696	6		T713	4		T836	1
values[105]	94	1			T696	3		T713	1		T836	3
values[106]	94	1			T696	7		T713	1		T836	3
values[107]	92	1			T696	3		T713	2		T836	2
values[108]	92	1			T696	5		T713	1		T836	1
values[109]	94	1			T696	9		T713	1		T836	2
values[110]	105	1			T696	10		T713	1		T836	4
values[111]	101	1			T696	9		T713	2		T836	1
values[112]	78	1			T696	4		T713	1		T836	1
values[113]	85	1			T713	3		T836	2		T852	2
values[114]	92	1			T713	1		T836	4		T852	1
values[115]	74	1			T713	2		T836	2		T852	1
values[116]	68	1			T713	1		T836	1		T852	1
values[117]	86	1			T713	1		T836	1		T852	1
values[118]	68	1			T713	1		T836	1		T852	1
values[119]	65	1			T713	1		T836	3		T852	2
values[120]	72	1			T713	2		T836	1		T852	2
values[121]	64	1			T713	1		T836	1		T852	1
values[122]	64	1			T713	1		T836	1		T852	1
values[123]	77	1			T713	1		T836	3		T852	3
values[124]	95	1			T713	2		T836	7		T852	6
values[125]	93	1			T713	1		T836	1		T852	2
values[126]	167	1			T713	4		T836	2		T852	3
values[127]	990	1			T713	29		T836	43		T852	34
values[128]	7752	1			T713	318		T836	302		T852	235