Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	133667	1			T76	86		T77	39		T82	6
values[2]	7808	1			T76	6		T250	84		T541	2
values[3]	3764	1			T76	1		T250	25		T429	16
values[4]	2247	1			T250	9		T429	14		T664	117
values[5]	1297	1			T250	1		T429	5		T664	93
values[6]	1026	1			T429	12		T664	40		T559	9
values[7]	927	1			T429	13		T664	8		T559	16
values[8]	626	1			T429	7		T664	3		T559	10
values[9]	610	1			T429	9		T559	20		T838	1
values[10]	497	1			T429	7		T559	7		T838	1
values[11]	546	1			T429	13		T559	4		T838	1
values[12]	517	1			T429	4		T559	5		T838	1
values[13]	491	1			T559	18		T838	1		T460	1
values[14]	484	1			T559	5		T838	1		T460	1
values[15]	533	1			T559	9		T838	1		T460	1
values[16]	456	1			T559	11		T838	1		T460	1
values[17]	429	1			T559	7		T838	1		T460	1
values[18]	414	1			T559	22		T838	1		T460	1
values[19]	441	1			T559	8		T838	1		T460	1
values[20]	406	1			T559	11		T838	1		T460	1
values[21]	382	1			T559	12		T838	1		T460	1
values[22]	387	1			T559	4		T838	1		T460	1
values[23]	404	1			T559	9		T838	1		T460	1
values[24]	397	1			T559	13		T838	1		T460	1
values[25]	421	1			T559	22		T838	1		T460	1
values[26]	374	1			T559	11		T838	1		T460	1
values[27]	310	1			T559	9		T838	1		T460	1
values[28]	292	1			T559	5		T838	1		T460	1
values[29]	332	1			T559	17		T838	1		T460	1
values[30]	334	1			T559	27		T838	1		T460	1
values[31]	344	1			T559	20		T838	1		T460	1
values[32]	342	1			T559	7		T838	1		T460	1
values[33]	304	1			T559	3		T838	1		T460	1
values[34]	310	1			T559	9		T838	1		T460	1
values[35]	283	1			T559	6		T838	1		T460	1
values[36]	246	1			T559	4		T838	1		T460	1
values[37]	321	1			T559	7		T838	1		T460	1
values[38]	293	1			T559	24		T838	1		T460	1
values[39]	339	1			T559	17		T838	1		T460	1
values[40]	269	1			T559	5		T838	1		T460	1
values[41]	230	1			T559	8		T838	1		T460	1
values[42]	261	1			T559	7		T838	1		T460	2
values[43]	285	1			T559	10		T838	1		T460	1
values[44]	229	1			T559	15		T838	1		T460	1
values[45]	272	1			T838	1		T460	1		T836	1
values[46]	226	1			T838	1		T460	1		T836	1
values[47]	163	1			T838	1		T460	1		T836	1
values[48]	172	1			T838	1		T460	1		T836	1
values[49]	213	1			T838	1		T460	1		T836	1
values[50]	160	1			T838	1		T460	1		T836	1
values[51]	176	1			T838	1		T460	1		T836	1
values[52]	170	1			T838	1		T460	1		T836	1
values[53]	145	1			T838	1		T460	1		T836	1
values[54]	126	1			T838	1		T460	1		T836	1
values[55]	100	1			T838	1		T460	1		T836	1
values[56]	86	1			T838	1		T460	1		T836	1
values[57]	100	1			T838	1		T460	1		T836	1
values[58]	93	1			T838	1		T460	1		T836	1
values[59]	77	1			T838	1		T460	1		T836	1
values[60]	55	1			T838	1		T460	1		T836	1
values[61]	59	1			T838	1		T460	1		T836	1
values[62]	83	1			T838	1		T460	1		T836	1
values[63]	91	1			T838	1		T460	1		T836	1
values[64]	61	1			T838	1		T460	1		T836	1
values[65]	93	1			T838	1		T460	1		T836	1
values[66]	88	1			T838	1		T460	1		T836	1
values[67]	80	1			T838	1		T460	1		T836	1
values[68]	76	1			T838	1		T460	1		T836	1
values[69]	68	1			T838	1		T460	1		T836	1
values[70]	77	1			T838	1		T460	1		T836	1
values[71]	100	1			T838	1		T460	1		T836	1
values[72]	99	1			T838	1		T460	1		T836	1
values[73]	102	1			T838	1		T460	1		T836	1
values[74]	118	1			T838	1		T460	1		T836	1
values[75]	120	1			T838	1		T460	1		T836	1
values[76]	146	1			T838	1		T460	1		T836	1
values[77]	120	1			T838	1		T460	1		T836	1
values[78]	101	1			T838	1		T460	1		T836	1
values[79]	77	1			T838	1		T460	1		T836	1
values[80]	83	1			T838	1		T460	1		T836	2
values[81]	116	1			T838	1		T460	1		T836	1
values[82]	124	1			T838	1		T460	1		T836	1
values[83]	97	1			T838	1		T460	1		T836	1
values[84]	100	1			T838	1		T460	1		T836	1
values[85]	95	1			T838	1		T460	1		T836	1
values[86]	81	1			T838	1		T460	1		T836	1
values[87]	74	1			T838	2		T460	1		T836	1
values[88]	95	1			T838	1		T460	1		T836	1
values[89]	117	1			T838	1		T460	1		T836	1
values[90]	94	1			T838	1		T460	1		T836	1
values[91]	81	1			T838	1		T460	1		T836	1
values[92]	92	1			T838	1		T460	2		T836	1
values[93]	77	1			T838	1		T460	10		T836	2
values[94]	60	1			T838	1		T460	3		T836	2
values[95]	62	1			T838	1		T460	1		T836	2
values[96]	73	1			T838	2		T460	1		T836	3
values[97]	67	1			T838	1		T460	1		T836	2
values[98]	86	1			T838	1		T460	1		T836	1
values[99]	83	1			T838	1		T460	3		T836	4
values[100]	78	1			T838	1		T460	5		T836	12
values[101]	49	1			T838	1		T460	2		T836	3
values[102]	42	1			T838	3		T460	1		T836	1
values[103]	50	1			T838	5		T460	2		T836	1
values[104]	34	1			T838	1		T460	3		T836	3
values[105]	34	1			T838	1		T460	6		T836	3
values[106]	32	1			T838	5		T460	1		T836	2
values[107]	36	1			T838	6		T460	2		T836	3
values[108]	32	1			T838	2		T460	1		T836	2
values[109]	41	1			T838	2		T460	1		T836	3
values[110]	39	1			T838	3		T460	3		T836	2
values[111]	42	1			T838	2		T460	10		T836	1
values[112]	32	1			T838	4		T460	2		T836	1
values[113]	39	1			T838	1		T460	7		T836	1
values[114]	36	1			T838	1		T460	3		T836	2
values[115]	37	1			T838	1		T460	2		T836	1
values[116]	51	1			T838	1		T460	3		T836	2
values[117]	44	1			T838	1		T460	2		T836	2
values[118]	50	1			T838	6		T460	2		T836	3
values[119]	51	1			T838	1		T460	2		T836	3
values[120]	55	1			T838	2		T460	2		T836	2
values[121]	41	1			T838	2		T460	1		T836	2
values[122]	35	1			T838	1		T460	3		T836	2
values[123]	42	1			T838	1		T460	1		T836	2
values[124]	37	1			T838	1		T460	1		T836	1
values[125]	51	1			T838	2		T460	1		T836	1
values[126]	94	1			T838	8		T460	1		T836	4
values[127]	1013	1			T838	66		T460	56		T836	61
values[128]	4825	1			T838	264		T460	220		T836	305