Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
5410 |
1 |
|
|
T92 |
51 |
|
T341 |
1063 |
|
T404 |
95 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
5413 |
1 |
|
|
T92 |
51 |
|
T341 |
1064 |
|
T404 |
95 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
5410 |
1 |
|
|
T92 |
51 |
|
T341 |
1063 |
|
T404 |
95 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
8878 |
1 |
|
|
T92 |
47 |
|
T93 |
5 |
|
T157 |
6 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
8881 |
1 |
|
|
T92 |
47 |
|
T93 |
5 |
|
T157 |
6 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
8878 |
1 |
|
|
T92 |
47 |
|
T93 |
5 |
|
T157 |
6 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
78 |
1 |
|
|
T66 |
1 |
|
T67 |
1 |
|
T68 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
81 |
1 |
|
|
T92 |
1 |
|
T741 |
1 |
|
T742 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
78 |
1 |
|
|
T66 |
1 |
|
T67 |
1 |
|
T68 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
2232 |
1 |
|
|
T394 |
810 |
|
T66 |
1 |
|
T723 |
814 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
2236 |
1 |
|
|
T92 |
1 |
|
T394 |
811 |
|
T742 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
2232 |
1 |
|
|
T394 |
810 |
|
T66 |
1 |
|
T723 |
814 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
2521 |
1 |
|
|
T91 |
1 |
|
T92 |
50 |
|
T386 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
2521 |
1 |
|
|
T91 |
1 |
|
T92 |
50 |
|
T386 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
2521 |
1 |
|
|
T91 |
1 |
|
T92 |
50 |
|
T386 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
2752 |
1 |
|
|
T711 |
504 |
|
T743 |
809 |
|
T243 |
2 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
2754 |
1 |
|
|
T711 |
504 |
|
T743 |
810 |
|
T243 |
2 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
2752 |
1 |
|
|
T711 |
504 |
|
T743 |
809 |
|
T243 |
2 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
3538 |
1 |
|
|
T744 |
807 |
|
T365 |
812 |
|
T243 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
3541 |
1 |
|
|
T744 |
808 |
|
T365 |
813 |
|
T243 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
3538 |
1 |
|
|
T744 |
807 |
|
T365 |
812 |
|
T243 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
1633 |
1 |
|
|
T745 |
533 |
|
T746 |
512 |
|
T747 |
503 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
1633 |
1 |
|
|
T745 |
533 |
|
T746 |
512 |
|
T747 |
503 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
1633 |
1 |
|
|
T745 |
533 |
|
T746 |
512 |
|
T747 |
503 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
2742 |
1 |
|
|
T748 |
822 |
|
T243 |
1 |
|
T749 |
522 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
2743 |
1 |
|
|
T748 |
823 |
|
T243 |
1 |
|
T749 |
522 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
2742 |
1 |
|
|
T748 |
822 |
|
T243 |
1 |
|
T749 |
522 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
2680 |
1 |
|
|
T91 |
2 |
|
T102 |
1 |
|
T92 |
40 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
2680 |
1 |
|
|
T91 |
2 |
|
T102 |
1 |
|
T92 |
40 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
2680 |
1 |
|
|
T91 |
2 |
|
T102 |
1 |
|
T92 |
40 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
229 |
1 |
|
|
T92 |
43 |
|
T296 |
1 |
|
T664 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
229 |
1 |
|
|
T92 |
43 |
|
T296 |
1 |
|
T664 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
229 |
1 |
|
|
T92 |
43 |
|
T296 |
1 |
|
T664 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
17892 |
1 |
|
|
T92 |
49 |
|
T670 |
1087 |
|
T93 |
2 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
17897 |
1 |
|
|
T92 |
49 |
|
T670 |
1087 |
|
T93 |
2 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
17892 |
1 |
|
|
T92 |
49 |
|
T670 |
1087 |
|
T93 |
2 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
284 |
1 |
|
|
T92 |
49 |
|
T296 |
1 |
|
T669 |
2 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
284 |
1 |
|
|
T92 |
49 |
|
T296 |
1 |
|
T669 |
2 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
284 |
1 |
|
|
T92 |
49 |
|
T296 |
1 |
|
T669 |
2 |