Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	140447	1			T85	102		T86	48		T87	1
values[2]	9536	1			T85	7		T86	2		T87	1
values[3]	4661	1			T87	1		T828	70		T546	1
values[4]	2604	1			T87	1		T828	11		T551	1
values[5]	1487	1			T87	1		T828	3		T551	1
values[6]	1028	1			T87	1		T551	1		T448	2
values[7]	767	1			T87	1		T551	1		T448	2
values[8]	755	1			T87	1		T551	1		T448	2
values[9]	615	1			T87	1		T551	1		T448	2
values[10]	650	1			T87	1		T551	1		T448	2
values[11]	598	1			T87	1		T551	1		T448	2
values[12]	503	1			T87	1		T551	1		T448	2
values[13]	603	1			T87	1		T551	1		T448	2
values[14]	532	1			T87	1		T551	1		T448	2
values[15]	477	1			T87	1		T551	1		T448	2
values[16]	378	1			T87	1		T551	1		T448	2
values[17]	490	1			T87	1		T551	1		T448	2
values[18]	451	1			T87	1		T551	1		T448	2
values[19]	487	1			T87	1		T551	1		T448	2
values[20]	483	1			T87	1		T551	1		T448	2
values[21]	405	1			T87	1		T551	1		T448	2
values[22]	358	1			T87	1		T551	1		T448	2
values[23]	430	1			T87	1		T551	1		T448	2
values[24]	374	1			T87	1		T551	2		T448	2
values[25]	298	1			T87	1		T551	1		T448	2
values[26]	295	1			T87	1		T551	1		T448	2
values[27]	409	1			T87	1		T551	1		T448	2
values[28]	337	1			T87	1		T551	1		T448	2
values[29]	338	1			T87	1		T551	1		T448	2
values[30]	414	1			T87	1		T551	1		T448	2
values[31]	402	1			T87	1		T551	1		T448	2
values[32]	332	1			T87	1		T551	1		T448	2
values[33]	311	1			T87	1		T551	1		T448	2
values[34]	320	1			T87	1		T551	1		T448	2
values[35]	298	1			T87	1		T551	1		T448	2
values[36]	274	1			T87	1		T551	1		T448	2
values[37]	302	1			T87	1		T551	1		T448	2
values[38]	305	1			T87	1		T551	1		T448	2
values[39]	307	1			T87	1		T551	1		T448	2
values[40]	282	1			T87	1		T551	1		T448	2
values[41]	278	1			T87	1		T551	1		T448	2
values[42]	247	1			T87	1		T551	1		T448	2
values[43]	198	1			T87	1		T551	1		T448	3
values[44]	223	1			T87	1		T551	1		T448	2
values[45]	262	1			T87	1		T551	1		T448	2
values[46]	276	1			T87	1		T551	1		T448	2
values[47]	188	1			T87	1		T551	1		T448	2
values[48]	179	1			T87	1		T551	1		T448	2
values[49]	133	1			T87	1		T551	1		T448	2
values[50]	145	1			T87	1		T551	1		T448	2
values[51]	165	1			T87	1		T551	1		T448	2
values[52]	182	1			T87	1		T551	1		T448	2
values[53]	134	1			T87	1		T551	1		T448	2
values[54]	97	1			T87	1		T551	1		T448	2
values[55]	115	1			T87	1		T551	1		T448	2
values[56]	107	1			T87	1		T551	1		T448	2
values[57]	106	1			T87	1		T551	1		T448	2
values[58]	95	1			T87	1		T551	1		T448	2
values[59]	69	1			T87	1		T551	1		T448	2
values[60]	91	1			T87	1		T551	1		T448	2
values[61]	112	1			T87	1		T551	1		T448	2
values[62]	120	1			T87	1		T551	1		T448	2
values[63]	96	1			T87	1		T551	1		T448	2
values[64]	105	1			T87	1		T551	1		T448	2
values[65]	103	1			T87	1		T551	1		T448	2
values[66]	106	1			T87	1		T551	2		T448	2
values[67]	72	1			T87	1		T551	1		T448	2
values[68]	105	1			T87	1		T551	1		T448	2
values[69]	130	1			T87	1		T551	1		T448	2
values[70]	135	1			T87	1		T551	1		T448	2
values[71]	129	1			T87	1		T551	1		T448	2
values[72]	124	1			T87	1		T551	1		T448	2
values[73]	104	1			T87	1		T551	1		T448	2
values[74]	135	1			T87	1		T551	1		T448	2
values[75]	92	1			T87	1		T551	1		T448	2
values[76]	87	1			T87	1		T551	1		T448	2
values[77]	105	1			T87	1		T551	1		T448	2
values[78]	99	1			T87	1		T551	1		T448	3
values[79]	112	1			T87	1		T551	1		T448	5
values[80]	99	1			T87	1		T551	1		T448	4
values[81]	91	1			T87	1		T551	1		T448	8
values[82]	93	1			T87	1		T551	1		T448	7
values[83]	78	1			T87	1		T551	1		T448	3
values[84]	95	1			T87	1		T551	1		T448	5
values[85]	75	1			T87	1		T551	1		T448	4
values[86]	85	1			T87	1		T551	1		T448	3
values[87]	90	1			T87	1		T551	1		T448	6
values[88]	92	1			T87	1		T551	1		T448	2
values[89]	67	1			T87	1		T551	1		T448	3
values[90]	76	1			T87	1		T551	1		T448	2
values[91]	78	1			T87	1		T551	1		T448	2
values[92]	87	1			T87	1		T551	1		T448	2
values[93]	92	1			T87	1		T551	1		T448	4
values[94]	96	1			T87	1		T551	1		T448	3
values[95]	73	1			T87	1		T551	1		T448	2
values[96]	76	1			T87	1		T551	1		T448	5
values[97]	65	1			T87	1		T551	1		T448	5
values[98]	93	1			T87	1		T551	1		T448	3
values[99]	78	1			T87	1		T551	1		T448	4
values[100]	85	1			T87	1		T551	1		T448	4
values[101]	71	1			T87	1		T551	1		T448	3
values[102]	83	1			T87	1		T551	1		T448	3
values[103]	83	1			T87	1		T551	1		T448	3
values[104]	76	1			T87	1		T551	1		T448	2
values[105]	55	1			T87	1		T551	1		T448	2
values[106]	76	1			T87	1		T551	1		T448	2
values[107]	86	1			T87	1		T551	1		T448	3
values[108]	57	1			T87	1		T551	1		T448	3
values[109]	63	1			T87	1		T551	1		T448	2
values[110]	46	1			T87	2		T551	1		T448	2
values[111]	40	1			T87	1		T551	1		T448	4
values[112]	55	1			T87	1		T551	1		T448	3
values[113]	62	1			T87	1		T551	2		T448	4
values[114]	58	1			T87	1		T551	2		T448	2
values[115]	66	1			T87	1		T551	2		T448	3
values[116]	55	1			T87	1		T551	2		T448	3
values[117]	56	1			T87	1		T551	7		T448	3
values[118]	41	1			T87	2		T551	3		T448	4
values[119]	45	1			T87	2		T551	1		T448	4
values[120]	51	1			T87	1		T551	2		T448	2
values[121]	57	1			T87	1		T551	1		T448	2
values[122]	64	1			T87	6		T551	1		T448	4
values[123]	53	1			T87	1		T551	3		T448	2
values[124]	46	1			T87	2		T551	1		T448	3
values[125]	41	1			T87	2		T551	1		T448	4
values[126]	139	1			T87	5		T551	3		T448	11
values[127]	1389	1			T87	88		T551	68		T448	118
values[128]	6326	1			T87	332		T551	323		T448	508