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Summary for Variable cp_error

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_error

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 959628 1 T85 370 T86 260 T87 1494
auto[1] 517098 1 T85 389 T86 85 T87 20



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] 371525 1 T85 116 T86 114 T87 533



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 1030030 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 446696 1 T85 175 T86 108 T87 535



Summary for Cross tl_d_chan_cov_cg_cc

Samples crossed: cp_opcode cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for tl_d_chan_cov_cg_cc

Bins
cp_opcodecp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] biggest_size 117643 1 T85 28 T86 28 T87 186

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%