Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
6796 |
1 |
|
|
T214 |
99 |
|
T223 |
1076 |
|
T86 |
59 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
6797 |
1 |
|
|
T214 |
99 |
|
T223 |
1076 |
|
T86 |
59 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
6796 |
1 |
|
|
T214 |
99 |
|
T223 |
1076 |
|
T86 |
59 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
3744 |
1 |
|
|
T86 |
78 |
|
T36 |
1 |
|
T64 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
3744 |
1 |
|
|
T86 |
78 |
|
T36 |
1 |
|
T64 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
3744 |
1 |
|
|
T86 |
78 |
|
T36 |
1 |
|
T64 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
86 |
1 |
|
|
T64 |
1 |
|
T83 |
1 |
|
T65 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
87 |
1 |
|
|
T64 |
1 |
|
T83 |
1 |
|
T738 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
86 |
1 |
|
|
T64 |
1 |
|
T83 |
1 |
|
T65 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
2199 |
1 |
|
|
T36 |
1 |
|
T64 |
1 |
|
T739 |
537 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
2201 |
1 |
|
|
T85 |
1 |
|
T86 |
1 |
|
T36 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
2199 |
1 |
|
|
T36 |
1 |
|
T64 |
1 |
|
T739 |
537 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
5459 |
1 |
|
|
T85 |
1 |
|
T86 |
63 |
|
T672 |
1721 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
5460 |
1 |
|
|
T85 |
1 |
|
T86 |
63 |
|
T672 |
1721 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
5459 |
1 |
|
|
T85 |
1 |
|
T86 |
63 |
|
T672 |
1721 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
1410 |
1 |
|
|
T246 |
2 |
|
T719 |
812 |
|
T64 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
1411 |
1 |
|
|
T246 |
2 |
|
T719 |
813 |
|
T64 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
1410 |
1 |
|
|
T246 |
2 |
|
T719 |
812 |
|
T64 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
5096 |
1 |
|
|
T316 |
508 |
|
T246 |
1 |
|
T64 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
5098 |
1 |
|
|
T316 |
508 |
|
T246 |
1 |
|
T64 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
5096 |
1 |
|
|
T316 |
508 |
|
T246 |
1 |
|
T64 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
5729 |
1 |
|
|
T246 |
1 |
|
T720 |
529 |
|
T64 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
5731 |
1 |
|
|
T246 |
1 |
|
T720 |
529 |
|
T64 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
5729 |
1 |
|
|
T246 |
1 |
|
T720 |
529 |
|
T64 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
2257 |
1 |
|
|
T368 |
819 |
|
T721 |
517 |
|
T246 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
2258 |
1 |
|
|
T368 |
819 |
|
T721 |
517 |
|
T246 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
2257 |
1 |
|
|
T368 |
819 |
|
T721 |
517 |
|
T246 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
5937 |
1 |
|
|
T214 |
92 |
|
T86 |
68 |
|
T64 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
5939 |
1 |
|
|
T214 |
92 |
|
T86 |
68 |
|
T64 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
5937 |
1 |
|
|
T214 |
92 |
|
T86 |
68 |
|
T64 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
306 |
1 |
|
|
T86 |
70 |
|
T296 |
1 |
|
T260 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
306 |
1 |
|
|
T86 |
70 |
|
T296 |
1 |
|
T260 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
306 |
1 |
|
|
T86 |
70 |
|
T296 |
1 |
|
T260 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
7800 |
1 |
|
|
T86 |
74 |
|
T293 |
1728 |
|
T64 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
7802 |
1 |
|
|
T86 |
74 |
|
T293 |
1729 |
|
T64 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
7800 |
1 |
|
|
T86 |
74 |
|
T293 |
1728 |
|
T64 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
303 |
1 |
|
|
T85 |
1 |
|
T86 |
73 |
|
T296 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
303 |
1 |
|
|
T85 |
1 |
|
T86 |
73 |
|
T296 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
303 |
1 |
|
|
T85 |
1 |
|
T86 |
73 |
|
T296 |
1 |