Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.alert_handler_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	147852	1			T78	99		T79	2		T80	8
values[2]	13407	1			T84	4		T251	1		T485	1
values[3]	5336	1			T251	1		T448	12		T571	98
values[4]	3059	1			T251	1		T448	18		T571	77
values[5]	1959	1			T251	1		T448	13		T571	53
values[6]	1354	1			T251	1		T448	26		T571	18
values[7]	977	1			T251	1		T448	12		T571	7
values[8]	621	1			T251	1		T448	16		T571	1
values[9]	402	1			T251	1		T448	7		T573	1
values[10]	367	1			T251	1		T448	18		T573	1
values[11]	262	1			T251	1		T448	16		T573	1
values[12]	251	1			T251	1		T448	8		T573	1
values[13]	238	1			T251	1		T448	13		T573	1
values[14]	242	1			T251	1		T448	23		T573	1
values[15]	228	1			T251	1		T448	9		T573	1
values[16]	250	1			T251	1		T448	21		T573	1
values[17]	236	1			T251	1		T448	20		T573	1
values[18]	254	1			T251	1		T448	12		T573	1
values[19]	239	1			T251	1		T448	8		T573	1
values[20]	191	1			T251	1		T448	9		T573	1
values[21]	213	1			T251	1		T448	32		T573	1
values[22]	187	1			T251	1		T448	21		T573	1
values[23]	221	1			T251	1		T448	12		T573	1
values[24]	255	1			T251	1		T448	15		T573	1
values[25]	241	1			T251	1		T448	16		T573	1
values[26]	208	1			T251	1		T448	13		T573	1
values[27]	190	1			T251	1		T448	15		T573	1
values[28]	194	1			T251	1		T448	8		T573	1
values[29]	208	1			T251	1		T448	7		T573	1
values[30]	230	1			T251	1		T448	25		T573	1
values[31]	233	1			T251	1		T448	13		T573	1
values[32]	192	1			T251	1		T448	19		T573	1
values[33]	233	1			T251	1		T448	25		T573	1
values[34]	234	1			T251	1		T448	10		T573	1
values[35]	224	1			T251	1		T448	17		T573	1
values[36]	238	1			T251	1		T448	11		T573	1
values[37]	237	1			T251	1		T448	9		T573	1
values[38]	216	1			T251	1		T448	10		T573	1
values[39]	235	1			T251	1		T448	11		T573	1
values[40]	202	1			T251	1		T448	17		T573	1
values[41]	201	1			T251	1		T448	21		T573	1
values[42]	234	1			T251	1		T448	21		T573	1
values[43]	244	1			T251	1		T448	20		T573	1
values[44]	242	1			T251	1		T448	7		T573	1
values[45]	221	1			T251	1		T448	25		T573	1
values[46]	182	1			T251	1		T448	17		T573	1
values[47]	163	1			T251	1		T448	11		T573	1
values[48]	189	1			T251	1		T448	14		T573	1
values[49]	171	1			T251	1		T448	6		T573	1
values[50]	209	1			T251	1		T448	15		T573	1
values[51]	160	1			T251	1		T448	22		T573	1
values[52]	135	1			T251	1		T448	13		T573	1
values[53]	154	1			T251	1		T448	11		T573	1
values[54]	205	1			T251	1		T448	7		T573	1
values[55]	193	1			T251	1		T448	22		T573	1
values[56]	182	1			T251	1		T448	20		T573	1
values[57]	182	1			T251	1		T448	10		T573	1
values[58]	174	1			T251	1		T448	12		T573	1
values[59]	151	1			T251	1		T448	23		T573	1
values[60]	134	1			T251	1		T448	14		T573	1
values[61]	125	1			T251	1		T448	16		T573	1
values[62]	116	1			T251	1		T448	8		T573	1
values[63]	118	1			T251	1		T448	4		T573	1
values[64]	129	1			T251	1		T448	5		T573	1
values[65]	161	1			T251	1		T448	8		T573	1
values[66]	91	1			T251	1		T448	4		T573	1
values[67]	91	1			T251	1		T448	10		T573	1
values[68]	114	1			T251	1		T448	3		T573	1
values[69]	100	1			T251	1		T448	1		T573	1
values[70]	95	1			T251	1		T573	1		T823	1
values[71]	74	1			T251	1		T573	1		T823	1
values[72]	55	1			T251	1		T573	1		T823	1
values[73]	88	1			T251	1		T573	1		T823	1
values[74]	68	1			T251	1		T573	1		T823	1
values[75]	59	1			T251	1		T573	1		T823	1
values[76]	70	1			T251	1		T573	1		T823	1
values[77]	71	1			T251	1		T573	1		T823	1
values[78]	62	1			T251	1		T573	1		T823	1
values[79]	47	1			T251	1		T573	1		T823	1
values[80]	42	1			T251	1		T573	1		T823	1
values[81]	53	1			T251	1		T573	2		T823	1
values[82]	61	1			T251	1		T573	1		T823	1
values[83]	73	1			T251	1		T573	1		T823	1
values[84]	65	1			T251	1		T573	1		T823	1
values[85]	64	1			T251	1		T573	1		T823	1
values[86]	52	1			T251	1		T573	1		T823	1
values[87]	57	1			T251	1		T573	1		T823	1
values[88]	66	1			T251	1		T573	1		T823	1
values[89]	66	1			T251	1		T573	1		T823	1
values[90]	66	1			T251	1		T573	1		T823	1
values[91]	47	1			T251	1		T573	1		T823	1
values[92]	65	1			T251	1		T573	1		T823	1
values[93]	51	1			T251	3		T573	1		T823	1
values[94]	68	1			T251	1		T573	1		T823	1
values[95]	72	1			T251	8		T573	8		T823	1
values[96]	72	1			T251	5		T573	6		T823	1
values[97]	65	1			T251	3		T573	3		T823	1
values[98]	60	1			T251	1		T573	1		T823	1
values[99]	65	1			T251	3		T573	2		T823	1
values[100]	50	1			T251	1		T573	1		T823	1
values[101]	51	1			T251	1		T573	2		T823	1
values[102]	72	1			T251	3		T573	2		T823	1
values[103]	53	1			T251	4		T573	3		T823	1
values[104]	56	1			T251	1		T573	3		T823	1
values[105]	61	1			T251	2		T573	1		T823	1
values[106]	63	1			T251	1		T573	2		T823	1
values[107]	59	1			T251	3		T573	5		T823	1
values[108]	58	1			T251	1		T573	2		T823	1
values[109]	69	1			T251	3		T573	2		T823	1
values[110]	57	1			T251	1		T573	2		T823	1
values[111]	49	1			T251	4		T573	2		T823	1
values[112]	54	1			T251	2		T573	2		T823	1
values[113]	46	1			T251	1		T573	3		T823	1
values[114]	55	1			T251	5		T573	3		T823	1
values[115]	42	1			T251	2		T573	4		T823	1
values[116]	52	1			T251	4		T573	1		T823	1
values[117]	41	1			T251	2		T573	1		T823	1
values[118]	74	1			T251	1		T573	1		T823	4
values[119]	38	1			T251	3		T573	1		T823	2
values[120]	44	1			T251	3		T573	1		T823	1
values[121]	60	1			T251	2		T573	5		T823	2
values[122]	58	1			T251	1		T573	3		T823	7
values[123]	68	1			T251	1		T573	2		T823	5
values[124]	60	1			T251	3		T573	2		T823	2
values[125]	48	1			T251	1		T573	2		T823	1
values[126]	81	1			T251	3		T573	3		T823	5
values[127]	759	1			T251	23		T573	36		T823	29
values[128]	7024	1			T251	260		T573	263		T823	263

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	163721	1			T78	85		T79	5		T80	9
values[2]	4612	1			T84	3		T452	1		T486	1
values[3]	2175	1			T452	2		T824	39		T591	1
values[4]	1498	1			T452	2		T824	27		T825	1
values[5]	1244	1			T452	3		T824	34		T825	1
values[6]	1151	1			T452	3		T824	24		T825	1
values[7]	1046	1			T452	1		T824	33		T825	1
values[8]	1014	1			T452	1		T824	25		T825	1
values[9]	970	1			T452	3		T824	35		T825	1
values[10]	935	1			T452	1		T824	55		T825	1
values[11]	801	1			T452	2		T824	35		T825	1
values[12]	694	1			T452	4		T824	18		T825	1
values[13]	564	1			T452	1		T824	7		T825	1
values[14]	574	1			T452	4		T824	1		T825	1
values[15]	475	1			T452	1		T825	1		T826	2
values[16]	471	1			T452	5		T825	1		T826	4
values[17]	390	1			T452	3		T825	1		T826	1
values[18]	341	1			T452	4		T825	1		T826	5
values[19]	281	1			T452	2		T825	1		T826	1
values[20]	278	1			T452	3		T825	1		T826	2
values[21]	225	1			T452	3		T825	1		T826	2
values[22]	203	1			T452	4		T825	1		T826	2
values[23]	241	1			T452	2		T825	1		T826	4
values[24]	272	1			T452	1		T825	1		T826	3
values[25]	289	1			T452	1		T825	1		T826	5
values[26]	244	1			T452	3		T825	1		T826	4
values[27]	258	1			T452	5		T825	1		T826	3
values[28]	278	1			T452	5		T825	1		T826	2
values[29]	234	1			T452	2		T825	1		T826	4
values[30]	191	1			T452	1		T825	1		T826	1
values[31]	185	1			T452	4		T825	1		T826	5
values[32]	155	1			T452	1		T825	1		T826	1
values[33]	169	1			T452	3		T825	1		T826	1
values[34]	131	1			T452	1		T825	1		T826	5
values[35]	140	1			T452	5		T825	1		T826	3
values[36]	127	1			T452	7		T825	1		T826	5
values[37]	107	1			T452	6		T825	1		T826	7
values[38]	110	1			T452	2		T825	1		T826	3
values[39]	126	1			T452	1		T825	1		T826	3
values[40]	107	1			T452	4		T825	1		T826	1
values[41]	109	1			T452	1		T825	1		T826	1
values[42]	109	1			T452	3		T825	1		T826	3
values[43]	86	1			T452	1		T825	1		T826	1
values[44]	109	1			T452	1		T825	1		T826	3
values[45]	90	1			T452	2		T825	1		T826	2
values[46]	96	1			T452	3		T825	1		T826	1
values[47]	102	1			T452	4		T825	1		T826	3
values[48]	93	1			T452	3		T825	1		T826	7
values[49]	74	1			T452	3		T825	1		T826	3
values[50]	53	1			T452	2		T825	1		T826	1
values[51]	55	1			T452	3		T825	1		T826	1
values[52]	70	1			T452	2		T825	1		T826	3
values[53]	66	1			T452	2		T825	1		T826	3
values[54]	79	1			T452	2		T825	1		T826	2
values[55]	109	1			T452	4		T825	1		T826	4
values[56]	94	1			T452	3		T825	1		T826	5
values[57]	84	1			T452	5		T825	1		T826	2
values[58]	91	1			T452	5		T825	1		T826	3
values[59]	70	1			T452	5		T825	1		T826	8
values[60]	71	1			T452	1		T825	1		T826	2
values[61]	73	1			T452	2		T825	1		T826	2
values[62]	57	1			T452	1		T825	1		T826	2
values[63]	72	1			T452	2		T825	1		T826	3
values[64]	57	1			T452	1		T825	1		T826	3
values[65]	56	1			T452	1		T825	1		T826	2
values[66]	54	1			T452	1		T825	1		T826	2
values[67]	53	1			T452	2		T825	1		T826	1
values[68]	53	1			T452	1		T825	1		T826	3
values[69]	70	1			T452	3		T825	1		T826	3
values[70]	51	1			T452	3		T825	1		T826	1
values[71]	55	1			T452	1		T825	1		T826	2
values[72]	53	1			T452	1		T825	1		T826	3
values[73]	51	1			T452	2		T825	1		T826	3
values[74]	76	1			T452	3		T825	1		T826	8
values[75]	77	1			T452	5		T825	1		T826	8
values[76]	76	1			T452	10		T825	1		T826	13
values[77]	74	1			T452	2		T825	1		T826	16
values[78]	60	1			T452	1		T825	1		T826	7
values[79]	69	1			T452	1		T825	1		T826	4
values[80]	86	1			T452	1		T825	1		T826	9
values[81]	62	1			T452	1		T825	1		T826	10
values[82]	78	1			T452	2		T825	1		T826	7
values[83]	66	1			T452	2		T825	1		T826	6
values[84]	85	1			T452	6		T825	1		T826	6
values[85]	71	1			T452	3		T825	1		T826	2
values[86]	75	1			T452	3		T825	1		T826	6
values[87]	81	1			T452	1		T825	1		T826	9
values[88]	91	1			T452	4		T825	1		T826	1
values[89]	81	1			T452	7		T825	1		T826	3
values[90]	71	1			T452	3		T825	1		T826	2
values[91]	80	1			T452	1		T825	1		T826	5
values[92]	93	1			T452	2		T825	1		T826	2
values[93]	84	1			T452	4		T825	1		T826	2
values[94]	85	1			T452	5		T825	1		T826	5
values[95]	80	1			T452	3		T825	1		T826	5
values[96]	86	1			T452	2		T825	1		T826	4
values[97]	85	1			T452	2		T825	1		T826	4
values[98]	93	1			T452	10		T825	1		T826	7
values[99]	87	1			T452	6		T825	1		T826	6
values[100]	96	1			T452	10		T825	1		T826	10
values[101]	112	1			T452	5		T825	2		T826	10
values[102]	113	1			T452	3		T825	1		T826	8
values[103]	82	1			T452	2		T825	1		T826	3
values[104]	100	1			T452	2		T825	1		T826	4
values[105]	105	1			T452	4		T825	1		T826	15
values[106]	99	1			T452	2		T825	1		T826	10
values[107]	108	1			T452	1		T825	1		T826	12
values[108]	97	1			T452	1		T825	1		T826	15
values[109]	93	1			T452	2		T825	1		T826	5
values[110]	96	1			T452	3		T825	1		T826	3
values[111]	88	1			T452	3		T825	1		T826	6
values[112]	90	1			T452	3		T825	1		T826	9
values[113]	97	1			T452	2		T825	1		T826	5
values[114]	112	1			T452	3		T825	1		T826	6
values[115]	97	1			T452	6		T825	1		T826	10
values[116]	85	1			T452	4		T825	1		T826	8
values[117]	77	1			T452	2		T825	1		T827	2
values[118]	80	1			T452	3		T825	1		T827	3
values[119]	93	1			T452	8		T825	1		T827	3
values[120]	101	1			T452	7		T825	1		T827	1
values[121]	88	1			T452	1		T825	1		T827	3
values[122]	97	1			T452	2		T825	1		T827	2
values[123]	122	1			T452	4		T825	1		T827	4
values[124]	250	1			T452	16		T825	1		T827	1
values[125]	455	1			T452	35		T825	2		T827	2
values[126]	872	1			T452	44		T825	8		T827	24
values[127]	1762	1			T452	24		T825	120		T827	117
values[128]	2809	1			T452	1		T825	230		T827	167

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	140894	1			T78	94		T79	5		T80	3
values[2]	9886	1			T84	157		T486	1		T561	3
values[3]	4072	1			T84	74		T489	1		T446	1
values[4]	2403	1			T84	27		T446	1		T636	31
values[5]	1553	1			T84	20		T636	15		T497	11
values[6]	1023	1			T84	7		T636	10		T497	3
values[7]	717	1			T84	1		T636	2		T497	1
values[8]	590	1			T497	5		T463	5		T494	4
values[9]	431	1			T497	3		T463	6		T494	3
values[10]	371	1			T497	5		T463	3		T447	8
values[11]	335	1			T497	8		T463	9		T447	3
values[12]	363	1			T497	1		T463	3		T447	7
values[13]	370	1			T497	5		T463	3		T447	11
values[14]	332	1			T497	2		T463	1		T447	9
values[15]	335	1			T497	3		T463	2		T447	3
values[16]	297	1			T497	5		T463	1		T447	7
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