CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 380436 | 1 | T82 | 1 | T134 | 28 | T255 | 74 | ||||
rising | 380522 | 1 | T82 | 1 | T134 | 28 | T255 | 74 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1057472 | 1 | T82 | 2 | T134 | 56 | T255 | 240 | ||||
auto[1] | 9498672 | 1 | T81 | 340 | T82 | 3868 | T83 | 316 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 329870 | 1 | T82 | 1 | T134 | 101 | T550 | 1 | ||||
rising | 329960 | 1 | T82 | 1 | T134 | 101 | T550 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1177607 | 1 | T82 | 2 | T134 | 211 | T550 | 2 | ||||
auto[1] | 10179849 | 1 | T81 | 254 | T82 | 3714 | T83 | 348 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 677976 | 1 | T82 | 1 | T134 | 48 | T135 | 1 | ||||
rising | 678072 | 1 | T82 | 1 | T134 | 48 | T135 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1076311 | 1 | T82 | 2 | T134 | 55 | T135 | 4 | ||||
auto[1] | 9598115 | 1 | T81 | 224 | T82 | 3672 | T83 | 334 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6749 | 1 | T135 | 1 | T550 | 1 | T551 | 17 | ||||
rising | 6791 | 1 | T135 | 1 | T550 | 1 | T551 | 17 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 173752 | 1 | T81 | 3 | T82 | 65 | T83 | 9 | ||||
auto[1] | 13395 | 1 | T135 | 1 | T550 | 1 | T551 | 17 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5603 | 1 | T82 | 2 | T135 | 2 | T573 | 1 | ||||
rising | 5633 | 1 | T82 | 2 | T135 | 2 | T561 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189339 | 1 | T81 | 8 | T82 | 63 | T83 | 6 | ||||
auto[1] | 8590 | 1 | T82 | 2 | T135 | 2 | T561 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3419 | 1 | T135 | 1 | T561 | 1 | T551 | 14 | ||||
rising | 3441 | 1 | T135 | 1 | T561 | 1 | T551 | 14 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183949 | 1 | T81 | 4 | T82 | 69 | T83 | 8 | ||||
auto[1] | 3710 | 1 | T135 | 1 | T561 | 1 | T551 | 14 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7039 | 1 | T561 | 1 | T551 | 5 | T566 | 1 | ||||
rising | 7086 | 1 | T561 | 1 | T551 | 5 | T566 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 169746 | 1 | T81 | 7 | T82 | 68 | T83 | 11 | ||||
auto[1] | 18276 | 1 | T561 | 1 | T551 | 5 | T566 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3990 | 1 | T82 | 1 | T135 | 2 | T550 | 1 | ||||
rising | 4018 | 1 | T82 | 1 | T135 | 2 | T550 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 181763 | 1 | T81 | 4 | T82 | 72 | T83 | 2 | ||||
auto[1] | 4535 | 1 | T82 | 1 | T135 | 2 | T550 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 9034 | 1 | T82 | 1 | T135 | 1 | T257 | 1 | ||||
rising | 9087 | 1 | T82 | 1 | T135 | 1 | T257 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175616 | 1 | T81 | 3 | T82 | 78 | T83 | 5 | ||||
auto[1] | 18702 | 1 | T82 | 1 | T135 | 1 | T257 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5596 | 1 | T82 | 1 | T135 | 2 | T550 | 2 | ||||
rising | 5649 | 1 | T82 | 1 | T135 | 2 | T550 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182361 | 1 | T81 | 5 | T82 | 62 | T83 | 3 | ||||
auto[1] | 11868 | 1 | T82 | 1 | T135 | 2 | T550 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6380 | 1 | T550 | 1 | T551 | 152 | T557 | 1 | ||||
rising | 6418 | 1 | T552 | 1 | T550 | 1 | T551 | 152 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183839 | 1 | T81 | 5 | T82 | 73 | T83 | 3 | ||||
auto[1] | 13058 | 1 | T552 | 1 | T550 | 1 | T551 | 301 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6318 | 1 | T82 | 4 | T550 | 5 | T551 | 19 | ||||
rising | 6350 | 1 | T82 | 4 | T550 | 5 | T551 | 20 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 188359 | 1 | T81 | 2 | T82 | 90 | T83 | 8 | ||||
auto[1] | 13317 | 1 | T82 | 4 | T550 | 5 | T551 | 21 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4572 | 1 | T82 | 2 | T561 | 1 | T550 | 3 | ||||
rising | 4602 | 1 | T82 | 2 | T561 | 1 | T550 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 178991 | 1 | T81 | 11 | T82 | 67 | T83 | 5 | ||||
auto[1] | 7075 | 1 | T82 | 2 | T561 | 3 | T550 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5314 | 1 | T82 | 2 | T550 | 1 | T551 | 1 | ||||
rising | 5346 | 1 | T82 | 2 | T550 | 1 | T551 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 193964 | 1 | T81 | 7 | T82 | 69 | T83 | 5 | ||||
auto[1] | 6792 | 1 | T82 | 2 | T550 | 1 | T551 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 14900 | 1 | T82 | 7 | T135 | 8 | T561 | 3 | ||||
rising | 14930 | 1 | T82 | 7 | T135 | 8 | T561 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1455371 | 1 | T81 | 33 | T82 | 550 | T83 | 51 | ||||
auto[1] | 15544 | 1 | T82 | 7 | T135 | 9 | T561 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5638 | 1 | T82 | 2 | T561 | 1 | T550 | 2 | ||||
rising | 5670 | 1 | T82 | 2 | T561 | 1 | T550 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 179793 | 1 | T81 | 4 | T82 | 87 | T83 | 8 | ||||
auto[1] | 11625 | 1 | T82 | 2 | T561 | 1 | T550 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8069 | 1 | T81 | 1 | T82 | 1 | T134 | 1 | ||||
rising | 8115 | 1 | T81 | 1 | T82 | 1 | T134 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 169856 | 1 | T81 | 4 | T82 | 68 | T83 | 3 | ||||
auto[1] | 21628 | 1 | T81 | 1 | T82 | 1 | T134 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2264 | 1 | T82 | 3 | T550 | 3 | T255 | 1 | ||||
rising | 2291 | 1 | T82 | 3 | T550 | 3 | T255 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 186453 | 1 | T81 | 1 | T82 | 73 | T83 | 10 | ||||
auto[1] | 2407 | 1 | T82 | 3 | T550 | 3 | T255 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7869 | 1 | T561 | 1 | T550 | 3 | T551 | 5 | ||||
rising | 7913 | 1 | T561 | 1 | T550 | 3 | T551 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 173779 | 1 | T81 | 2 | T82 | 75 | T83 | 8 | ||||
auto[1] | 14973 | 1 | T561 | 1 | T550 | 3 | T551 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7199 | 1 | T82 | 3 | T135 | 1 | T551 | 2 | ||||
rising | 7241 | 1 | T82 | 3 | T135 | 1 | T551 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 171868 | 1 | T81 | 9 | T82 | 76 | T83 | 6 | ||||
auto[1] | 13733 | 1 | T82 | 3 | T135 | 1 | T551 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6494 | 1 | T81 | 1 | T82 | 4 | T135 | 2 | ||||
rising | 6541 | 1 | T81 | 1 | T82 | 4 | T135 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 170929 | 1 | T81 | 7 | T82 | 87 | T83 | 8 | ||||
auto[1] | 13430 | 1 | T81 | 1 | T82 | 4 | T135 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4984 | 1 | T82 | 1 | T550 | 4 | T573 | 1 | ||||
rising | 5021 | 1 | T82 | 1 | T550 | 4 | T573 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177399 | 1 | T81 | 6 | T82 | 81 | T83 | 6 | ||||
auto[1] | 7592 | 1 | T82 | 1 | T550 | 4 | T573 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3187 | 1 | T82 | 2 | T552 | 2 | T550 | 2 | ||||
rising | 3210 | 1 | T82 | 2 | T552 | 2 | T550 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 203055 | 1 | T81 | 4 | T82 | 77 | T83 | 3 | ||||
auto[1] | 3404 | 1 | T82 | 2 | T552 | 2 | T550 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5699 | 1 | T82 | 2 | T550 | 1 | T551 | 2 | ||||
rising | 5738 | 1 | T82 | 2 | T550 | 1 | T551 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 166992 | 1 | T81 | 5 | T82 | 75 | T83 | 9 | ||||
auto[1] | 8641 | 1 | T82 | 2 | T550 | 1 | T551 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 47266 | 1 | T576 | 1519 | T387 | 3 | T577 | 1080 | ||||
rising | 47275 | 1 | T576 | 1519 | T387 | 3 | T577 | 1080 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 101910 | 1 | T576 | 3183 | T387 | 14 | T577 | 2312 | ||||
auto[1] | 92438 | 1 | T576 | 3092 | T387 | 3 | T577 | 2180 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 26942 | 1 | T576 | 815 | T387 | 2 | T577 | 588 | ||||
rising | 26933 | 1 | T576 | 815 | T387 | 2 | T577 | 587 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 161009 | 1 | T576 | 5320 | T387 | 13 | T577 | 3761 | ||||
auto[1] | 33339 | 1 | T576 | 955 | T387 | 4 | T577 | 731 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 26942 | 1 | T576 | 815 | T387 | 2 | T577 | 588 | ||||
rising | 26933 | 1 | T576 | 815 | T387 | 2 | T577 | 587 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 161009 | 1 | T576 | 5320 | T387 | 13 | T577 | 3761 | ||||
auto[1] | 33339 | 1 | T576 | 955 | T387 | 4 | T577 | 731 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4322 | 1 | T576 | 71 | T387 | 3 | T577 | 75 | ||||
rising | 4316 | 1 | T576 | 71 | T387 | 3 | T577 | 75 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 188268 | 1 | T576 | 6193 | T387 | 10 | T577 | 4369 | ||||
auto[1] | 6080 | 1 | T576 | 82 | T387 | 7 | T577 | 123 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 130883 | 1 | T153 | 4933 | T576 | 3 | T154 | 325 | ||||
rising | 130900 | 1 | T153 | 4934 | T576 | 3 | T154 | 325 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 40370297 | 1 | T4 | 109616 | T5 | 13471 | T6 | 18348 | ||||
auto[1] | 699493 | 1 | T153 | 46206 | T576 | 3 | T154 | 444 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 47976 | 1 | T576 | 1548 | T387 | 4 | T577 | 1103 | ||||
rising | 47983 | 1 | T576 | 1548 | T387 | 5 | T577 | 1104 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 102352 | 1 | T576 | 3218 | T387 | 10 | T577 | 2303 | ||||
auto[1] | 91996 | 1 | T576 | 3057 | T387 | 7 | T577 | 2189 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 40945 | 1 | T576 | 1319 | T387 | 3 | T577 | 945 | ||||
rising | 40943 | 1 | T576 | 1320 | T387 | 3 | T577 | 944 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 135855 | 1 | T576 | 4411 | T387 | 14 | T577 | 3162 | ||||
auto[1] | 58493 | 1 | T576 | 1864 | T387 | 3 | T577 | 1330 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2243 | 1 | T82 | 1 | T561 | 1 | T255 | 1 | ||||
rising | 2264 | 1 | T82 | 1 | T561 | 1 | T255 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 194550 | 1 | T81 | 3 | T82 | 66 | T83 | 4 | ||||
auto[1] | 2374 | 1 | T82 | 1 | T561 | 1 | T255 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3149 | 1 | T82 | 4 | T561 | 1 | T550 | 1 | ||||
rising | 3171 | 1 | T82 | 4 | T561 | 1 | T550 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 185032 | 1 | T81 | 2 | T82 | 70 | T83 | 8 | ||||
auto[1] | 3354 | 1 | T82 | 4 | T561 | 1 | T550 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5676 | 1 | T81 | 1 | T82 | 2 | T561 | 1 | ||||
rising | 5732 | 1 | T81 | 1 | T82 | 2 | T561 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 160617 | 1 | T81 | 6 | T82 | 84 | T83 | 4 | ||||
auto[1] | 23227 | 1 | T81 | 1 | T82 | 2 | T561 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7107 | 1 | T82 | 1 | T550 | 1 | T551 | 2 | ||||
rising | 7155 | 1 | T82 | 1 | T550 | 1 | T551 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 166147 | 1 | T81 | 8 | T82 | 92 | T83 | 2 | ||||
auto[1] | 19519 | 1 | T82 | 1 | T550 | 3 | T551 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2751 | 1 | T81 | 1 | T82 | 1 | T135 | 1 | ||||
rising | 2784 | 1 | T81 | 1 | T82 | 1 | T135 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 178556 | 1 | T81 | 7 | T82 | 63 | T83 | 3 | ||||
auto[1] | 2944 | 1 | T81 | 1 | T82 | 1 | T135 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7728 | 1 | T135 | 2 | T257 | 1 | T552 | 1 | ||||
rising | 7778 | 1 | T135 | 2 | T257 | 1 | T552 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182180 | 1 | T81 | 7 | T82 | 78 | T83 | 9 | ||||
auto[1] | 14991 | 1 | T135 | 2 | T257 | 1 | T552 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6824 | 1 | T82 | 1 | T561 | 1 | T550 | 2 | ||||
rising | 6861 | 1 | T82 | 1 | T135 | 1 | T561 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 172895 | 1 | T81 | 8 | T82 | 85 | T83 | 11 | ||||
auto[1] | 12595 | 1 | T82 | 1 | T135 | 1 | T561 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5381 | 1 | T82 | 2 | T550 | 2 | T551 | 7 | ||||
rising | 5414 | 1 | T82 | 2 | T550 | 2 | T551 | 7 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 181034 | 1 | T81 | 7 | T82 | 78 | T83 | 7 | ||||
auto[1] | 11003 | 1 | T82 | 2 | T550 | 2 | T551 | 7 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 22388 | 1 | T81 | 2 | T82 | 11 | T83 | 1 | ||||
rising | 22419 | 1 | T81 | 2 | T82 | 11 | T83 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1456166 | 1 | T81 | 40 | T82 | 534 | T83 | 57 | ||||
auto[1] | 23436 | 1 | T81 | 2 | T82 | 11 | T83 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5018 | 1 | T82 | 1 | T257 | 1 | T551 | 2 | ||||
rising | 5050 | 1 | T82 | 1 | T257 | 1 | T551 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 168632 | 1 | T81 | 7 | T82 | 76 | T83 | 7 | ||||
auto[1] | 8454 | 1 | T82 | 1 | T257 | 1 | T551 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6598 | 1 | T82 | 1 | T135 | 1 | T552 | 1 | ||||
rising | 6637 | 1 | T82 | 1 | T135 | 1 | T552 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182954 | 1 | T81 | 8 | T82 | 76 | T83 | 9 | ||||
auto[1] | 10456 | 1 | T82 | 1 | T135 | 1 | T552 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 192852 | 1 | T83 | 14 | T255 | 43 | T256 | 647 | ||||
rising | 192855 | 1 | T83 | 14 | T255 | 44 | T256 | 647 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1738221 | 1 | T83 | 139 | T255 | 482 | T256 | 5824 | ||||
auto[1] | 217178 | 1 | T83 | 15 | T255 | 52 | T256 | 728 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 480560 | 1 | T83 | 41 | T255 | 136 | T256 | 1587 | ||||
rising | 480560 | 1 | T83 | 41 | T255 | 136 | T256 | 1587 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 869088 | 1 | T83 | 67 | T255 | 240 | T256 | 2915 | ||||
auto[1] | 1086311 | 1 | T83 | 87 | T255 | 294 | T256 | 3637 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 480560 | 1 | T83 | 41 | T255 | 136 | T256 | 1587 | ||||
rising | 480560 | 1 | T83 | 41 | T255 | 136 | T256 | 1587 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 869088 | 1 | T83 | 67 | T255 | 240 | T256 | 2915 | ||||
auto[1] | 1086311 | 1 | T83 | 87 | T255 | 294 | T256 | 3637 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |