Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pwm_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	145289	1			T81	7		T82	78		T83	9
values[2]	11945	1			T135	2		T257	1		T552	1
values[3]	4352	1			T135	1		T551	204		T557	40
values[4]	2530	1			T551	128		T557	10		T440	15
values[5]	1624	1			T551	68		T557	2		T440	18
values[6]	1209	1			T551	85		T440	29		T907	50
values[7]	927	1			T551	84		T440	17		T907	29
values[8]	728	1			T551	65		T440	19		T907	40
values[9]	673	1			T551	68		T440	27		T907	23
values[10]	495	1			T551	39		T440	10		T907	15
values[11]	503	1			T551	25		T440	27		T907	6
values[12]	369	1			T551	13		T440	17		T723	4
values[13]	344	1			T551	1		T440	19		T723	5
values[14]	391	1			T440	29		T723	9		T896	1
values[15]	346	1			T440	23		T723	10		T896	1
values[16]	350	1			T440	32		T723	7		T896	1
values[17]	325	1			T440	19		T723	5		T896	1
values[18]	262	1			T440	9		T723	8		T896	1
values[19]	305	1			T440	17		T723	7		T896	1
values[20]	295	1			T440	22		T723	7		T896	1
values[21]	325	1			T440	29		T723	9		T896	1
values[22]	308	1			T440	19		T723	4		T896	1
values[23]	322	1			T440	23		T723	12		T896	1
values[24]	344	1			T440	13		T723	8		T896	1
values[25]	342	1			T440	19		T723	7		T896	1
values[26]	333	1			T440	16		T723	8		T896	1
values[27]	282	1			T440	14		T723	12		T896	1
values[28]	272	1			T440	25		T723	13		T896	1
values[29]	306	1			T440	21		T723	10		T896	1
values[30]	307	1			T440	35		T723	4		T896	1
values[31]	331	1			T440	41		T723	5		T896	1
values[32]	348	1			T440	25		T723	4		T896	1
values[33]	303	1			T440	15		T723	5		T896	1
values[34]	315	1			T440	20		T723	6		T896	1
values[35]	291	1			T440	12		T723	6		T896	1
values[36]	261	1			T440	15		T723	5		T896	1
values[37]	314	1			T440	29		T723	6		T896	1
values[38]	310	1			T440	19		T723	6		T896	1
values[39]	290	1			T440	25		T723	4		T896	1
values[40]	273	1			T440	24		T723	8		T896	1
values[41]	322	1			T440	29		T723	5		T896	1
values[42]	336	1			T440	33		T723	7		T896	1
values[43]	278	1			T440	32		T723	4		T896	1
values[44]	304	1			T440	20		T723	13		T896	1
values[45]	293	1			T440	16		T723	14		T896	1
values[46]	300	1			T440	9		T723	3		T896	1
values[47]	278	1			T440	22		T723	9		T896	1
values[48]	263	1			T440	17		T723	13		T896	1
values[49]	252	1			T440	19		T723	6		T896	1
values[50]	284	1			T440	21		T723	5		T896	1
values[51]	227	1			T440	22		T723	6		T896	1
values[52]	247	1			T440	15		T723	5		T896	1
values[53]	257	1			T440	17		T723	5		T896	1
values[54]	251	1			T440	23		T723	3		T896	1
values[55]	258	1			T440	16		T723	4		T896	1
values[56]	264	1			T440	28		T723	12		T896	1
values[57]	302	1			T440	19		T723	7		T896	1
values[58]	257	1			T440	20		T723	11		T896	1
values[59]	266	1			T440	20		T723	9		T896	1
values[60]	268	1			T440	29		T723	11		T896	1
values[61]	217	1			T440	21		T723	3		T896	1
values[62]	215	1			T440	28		T723	4		T896	1
values[63]	277	1			T440	29		T723	6		T896	2
values[64]	255	1			T440	29		T723	9		T896	1
values[65]	234	1			T440	24		T723	9		T896	1
values[66]	217	1			T440	24		T723	8		T896	1
values[67]	233	1			T440	25		T723	5		T896	1
values[68]	164	1			T440	15		T723	5		T896	1
values[69]	209	1			T440	19		T723	5		T896	1
values[70]	198	1			T440	18		T723	4		T896	1
values[71]	168	1			T440	15		T723	7		T896	1
values[72]	168	1			T440	14		T896	1		T495	1
values[73]	141	1			T440	20		T896	1		T495	1
values[74]	149	1			T440	14		T896	1		T495	1
values[75]	163	1			T440	32		T896	1		T495	1
values[76]	87	1			T440	4		T896	1		T495	1
values[77]	72	1			T896	1		T495	1		T925	1
values[78]	97	1			T896	1		T495	1		T925	1
values[79]	76	1			T896	1		T495	1		T925	1
values[80]	74	1			T896	1		T495	1		T925	1
values[81]	65	1			T896	1		T495	1		T925	1
values[82]	60	1			T896	1		T495	1		T925	1
values[83]	57	1			T896	1		T495	1		T925	1
values[84]	70	1			T896	1		T495	1		T925	1
values[85]	76	1			T896	1		T495	1		T925	1
values[86]	70	1			T896	1		T495	1		T925	1
values[87]	80	1			T896	1		T495	1		T925	1
values[88]	79	1			T896	1		T495	1		T925	1
values[89]	72	1			T896	1		T495	1		T925	1
values[90]	96	1			T896	1		T495	2		T925	1
values[91]	80	1			T896	1		T495	1		T925	1
values[92]	88	1			T896	1		T495	1		T925	1
values[93]	52	1			T896	1		T495	1		T925	1
values[94]	54	1			T896	1		T495	1		T925	1
values[95]	72	1			T896	1		T495	1		T925	1
values[96]	63	1			T896	1		T495	1		T925	1
values[97]	88	1			T896	1		T495	1		T925	1
values[98]	64	1			T896	1		T495	1		T925	1
values[99]	67	1			T896	1		T495	1		T925	1
values[100]	69	1			T896	1		T495	1		T925	1
values[101]	67	1			T896	1		T495	1		T925	2
values[102]	58	1			T896	1		T495	1		T925	1
values[103]	60	1			T896	1		T495	1		T925	1
values[104]	56	1			T896	1		T495	1		T925	1
values[105]	66	1			T896	1		T495	8		T925	1
values[106]	75	1			T896	1		T495	3		T925	1
values[107]	70	1			T896	1		T495	2		T925	1
values[108]	59	1			T896	1		T495	2		T925	1
values[109]	52	1			T896	1		T495	1		T925	1
values[110]	49	1			T896	1		T495	2		T925	1
values[111]	53	1			T896	1		T495	1		T925	1
values[112]	54	1			T896	1		T495	1		T925	1
values[113]	58	1			T896	1		T495	3		T925	1
values[114]	57	1			T896	1		T495	2		T925	1
values[115]	59	1			T896	1		T495	2		T925	1
values[116]	61	1			T896	1		T495	1		T925	1
values[117]	50	1			T896	1		T495	4		T925	1
values[118]	50	1			T896	1		T495	2		T925	1
values[119]	51	1			T896	5		T495	1		T925	1
values[120]	52	1			T896	10		T495	2		T925	1
values[121]	52	1			T896	2		T495	5		T925	1
values[122]	51	1			T896	2		T495	3		T925	1
values[123]	49	1			T896	1		T495	5		T925	1
values[124]	47	1			T896	1		T495	4		T925	1
values[125]	41	1			T896	1		T495	1		T925	1
values[126]	98	1			T896	4		T495	2		T925	4
values[127]	683	1			T896	32		T495	30		T925	44
values[128]	5211	1			T896	324		T495	300		T925	389