Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rstmgr_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	142038	1			T81	7		T82	75		T83	7
values[2]	9669	1			T82	2		T134	1		T257	2
values[3]	3471	1			T523	1		T440	6		T583	15
values[4]	2029	1			T440	13		T583	1		T438	37
values[5]	1325	1			T440	10		T438	23		T472	6
values[6]	811	1			T440	5		T438	4		T733	37
values[7]	541	1			T440	4		T733	18		T888	4
values[8]	405	1			T440	12		T733	6		T888	12
values[9]	327	1			T440	8		T888	6		T686	2
values[10]	330	1			T440	7		T888	14		T686	3
values[11]	284	1			T440	4		T888	5		T686	2
values[12]	239	1			T440	5		T888	4		T686	1
values[13]	271	1			T440	6		T888	3		T686	2
values[14]	244	1			T440	12		T888	16		T686	6
values[15]	215	1			T440	7		T888	3		T686	2
values[16]	236	1			T440	7		T888	6		T686	1
values[17]	209	1			T440	11		T888	7		T686	1
values[18]	260	1			T440	3		T888	7		T686	8
values[19]	257	1			T440	5		T888	4		T686	7
values[20]	243	1			T440	6		T888	4		T686	2
values[21]	225	1			T440	15		T888	12		T686	4
values[22]	270	1			T440	9		T888	13		T686	5
values[23]	225	1			T440	7		T888	4		T686	2
values[24]	225	1			T440	9		T888	6		T686	6
values[25]	197	1			T440	7		T888	7		T686	4
values[26]	213	1			T440	5		T888	10		T686	2
values[27]	273	1			T440	16		T888	21		T686	1
values[28]	221	1			T440	8		T888	3		T686	1
values[29]	277	1			T440	9		T888	7		T686	1
values[30]	219	1			T440	7		T888	6		T686	4
values[31]	200	1			T440	4		T888	4		T686	3
values[32]	264	1			T440	18		T888	3		T686	3
values[33]	214	1			T440	8		T888	9		T686	4
values[34]	248	1			T440	10		T888	13		T686	1
values[35]	218	1			T440	3		T888	16		T686	2
values[36]	247	1			T440	8		T888	19		T686	2
values[37]	178	1			T440	5		T888	3		T686	1
values[38]	223	1			T440	6		T888	9		T686	2
values[39]	231	1			T440	3		T888	5		T686	2
values[40]	204	1			T440	3		T888	9		T686	1
values[41]	223	1			T440	34		T888	5		T686	2
values[42]	225	1			T440	17		T888	3		T686	2
values[43]	237	1			T440	6		T888	6		T686	5
values[44]	211	1			T440	4		T888	12		T686	7
values[45]	196	1			T440	5		T888	11		T686	11
values[46]	247	1			T440	5		T888	11		T686	11
values[47]	200	1			T440	5		T888	6		T686	6
values[48]	212	1			T440	2		T888	7		T686	4
values[49]	207	1			T440	7		T888	6		T686	6
values[50]	203	1			T440	4		T888	8		T686	2
values[51]	170	1			T440	2		T888	6		T686	7
values[52]	200	1			T440	8		T888	8		T686	3
values[53]	186	1			T440	11		T888	7		T686	2
values[54]	196	1			T440	10		T888	2		T686	2
values[55]	209	1			T440	16		T888	5		T686	1
values[56]	154	1			T440	5		T888	8		T686	3
values[57]	198	1			T440	2		T888	12		T686	3
values[58]	161	1			T440	7		T888	15		T686	4
values[59]	160	1			T440	12		T888	4		T686	4
values[60]	124	1			T440	1		T888	5		T686	2
values[61]	141	1			T888	3		T686	1		T893	14
values[62]	115	1			T888	7		T686	2		T893	6
values[63]	132	1			T888	6		T686	1		T893	6
values[64]	147	1			T888	5		T686	5		T893	13
values[65]	113	1			T888	7		T686	3		T890	1
values[66]	98	1			T888	1		T686	1		T890	1
values[67]	125	1			T686	5		T890	1		T495	1
values[68]	99	1			T686	7		T890	1		T495	1
values[69]	112	1			T686	23		T890	1		T495	1
values[70]	96	1			T686	29		T890	1		T495	1
values[71]	61	1			T686	14		T890	1		T495	1
values[72]	58	1			T686	18		T890	1		T495	1
values[73]	50	1			T686	18		T890	1		T495	1
values[74]	28	1			T686	12		T890	1		T495	1
values[75]	25	1			T686	6		T890	1		T495	1
values[76]	24	1			T686	12		T890	1		T495	1
values[77]	31	1			T686	10		T890	1		T495	1
values[78]	23	1			T686	5		T890	1		T495	1
values[79]	28	1			T686	6		T890	1		T495	1
values[80]	24	1			T686	9		T890	1		T495	1
values[81]	21	1			T686	9		T890	1		T495	1
values[82]	17	1			T686	1		T890	1		T495	1
values[83]	18	1			T890	1		T495	1		T905	1
values[84]	15	1			T890	1		T495	1		T905	1
values[85]	16	1			T890	1		T495	1		T905	1
values[86]	13	1			T890	1		T495	1		T905	1
values[87]	12	1			T890	1		T495	1		T905	1
values[88]	10	1			T890	1		T495	1		T905	1
values[89]	13	1			T890	1		T495	1		T905	1
values[90]	12	1			T890	1		T495	1		T905	2
values[91]	18	1			T890	1		T495	1		T905	1
values[92]	22	1			T890	1		T495	1		T905	1
values[93]	22	1			T890	1		T495	1		T905	1
values[94]	18	1			T890	1		T495	1		T905	1
values[95]	14	1			T890	1		T495	1		T905	1
values[96]	9	1			T890	1		T495	1		T905	1
values[97]	9	1			T890	1		T495	1		T905	1
values[98]	12	1			T890	1		T495	1		T905	1
values[99]	10	1			T890	2		T495	1		T905	1
values[100]	17	1			T890	2		T495	1		T905	1
values[101]	18	1			T890	8		T495	1		T905	1
values[102]	20	1			T890	3		T495	1		T905	1
values[103]	21	1			T890	2		T495	1		T905	1
values[104]	14	1			T890	1		T495	1		T905	1
values[105]	14	1			T890	3		T495	1		T905	1
values[106]	17	1			T890	3		T495	1		T905	1
values[107]	15	1			T890	3		T495	1		T905	1
values[108]	22	1			T890	2		T495	1		T905	1
values[109]	13	1			T890	1		T495	1		T905	1
values[110]	13	1			T890	1		T495	1		T905	1
values[111]	22	1			T890	4		T495	1		T905	1
values[112]	15	1			T890	1		T495	1		T905	2
values[113]	14	1			T890	1		T495	1		T905	1
values[114]	20	1			T890	7		T495	1		T905	2
values[115]	19	1			T890	1		T495	3		T905	1
values[116]	17	1			T890	1		T495	3		T905	3
values[117]	20	1			T890	1		T495	2		T905	1
values[118]	15	1			T890	1		T495	2		T905	1
values[119]	17	1			T890	3		T495	1		T905	2
values[120]	17	1			T890	2		T495	2		T905	2
values[121]	17	1			T890	1		T495	1		T905	1
values[122]	16	1			T890	1		T495	1		T905	1
values[123]	21	1			T890	1		T495	6		T905	1
values[124]	20	1			T890	1		T495	1		T905	2
values[125]	22	1			T890	2		T495	1		T905	3
values[126]	24	1			T890	3		T495	6		T905	3
values[127]	268	1			T890	29		T495	25		T905	26
values[128]	2632	1			T890	251		T495	249		T905	332