Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	140225	1			T81	10		T82	67		T83	8
values[2]	9091	1			T82	2		T134	1		T135	1
values[3]	4147	1			T551	114		T557	39		T440	21
values[4]	2381	1			T551	84		T557	43		T440	24
values[5]	1551	1			T551	39		T557	9		T440	13
values[6]	1133	1			T551	15		T440	28		T472	20
values[7]	1003	1			T440	16		T472	19		T930	1
values[8]	738	1			T440	26		T472	16		T930	1
values[9]	730	1			T440	11		T472	26		T930	1
values[10]	598	1			T440	14		T472	8		T930	1
values[11]	605	1			T440	17		T472	14		T930	1
values[12]	538	1			T440	8		T472	18		T930	1
values[13]	523	1			T440	10		T472	9		T930	1
values[14]	623	1			T440	6		T472	13		T930	1
values[15]	663	1			T440	15		T472	4		T930	1
values[16]	566	1			T440	10		T472	8		T930	1
values[17]	631	1			T440	6		T472	10		T930	1
values[18]	457	1			T440	17		T472	9		T930	1
values[19]	516	1			T440	13		T472	19		T930	1
values[20]	517	1			T440	3		T472	17		T930	1
values[21]	446	1			T440	6		T472	6		T930	1
values[22]	485	1			T440	6		T472	3		T930	1
values[23]	447	1			T440	9		T472	3		T930	1
values[24]	434	1			T440	8		T472	8		T930	1
values[25]	422	1			T440	15		T472	29		T930	1
values[26]	481	1			T440	16		T472	6		T930	1
values[27]	478	1			T440	9		T472	9		T930	1
values[28]	353	1			T440	10		T472	5		T930	1
values[29]	325	1			T440	14		T472	3		T930	1
values[30]	368	1			T440	6		T472	11		T930	1
values[31]	350	1			T440	5		T472	10		T930	1
values[32]	355	1			T440	3		T472	7		T930	1
values[33]	384	1			T440	12		T472	8		T930	1
values[34]	384	1			T440	21		T472	7		T930	1
values[35]	397	1			T440	16		T472	4		T930	1
values[36]	321	1			T440	8		T472	3		T930	1
values[37]	315	1			T440	9		T472	9		T930	1
values[38]	385	1			T440	13		T472	21		T930	1
values[39]	328	1			T440	4		T472	30		T930	1
values[40]	327	1			T440	23		T472	8		T930	1
values[41]	303	1			T472	8		T930	1		T686	1
values[42]	311	1			T472	4		T930	1		T686	2
values[43]	292	1			T472	4		T930	1		T686	1
values[44]	350	1			T472	13		T930	1		T686	4
values[45]	329	1			T472	7		T930	1		T686	5
values[46]	216	1			T472	10		T930	1		T686	3
values[47]	256	1			T472	13		T930	2		T686	7
values[48]	225	1			T930	1		T686	11		T902	1
values[49]	197	1			T930	1		T686	10		T902	1
values[50]	220	1			T930	1		T686	5		T902	1
values[51]	211	1			T930	1		T686	3		T902	1
values[52]	192	1			T930	1		T686	2		T902	1
values[53]	120	1			T930	1		T686	1		T902	1
values[54]	118	1			T930	1		T686	2		T902	1
values[55]	89	1			T930	1		T686	1		T902	1
values[56]	93	1			T930	1		T686	2		T902	1
values[57]	90	1			T930	1		T686	2		T902	1
values[58]	97	1			T930	1		T686	3		T902	1
values[59]	94	1			T930	1		T686	16		T902	1
values[60]	101	1			T930	1		T686	22		T902	1
values[61]	115	1			T930	1		T686	26		T902	1
values[62]	75	1			T930	1		T686	6		T902	1
values[63]	70	1			T930	1		T686	1		T902	1
values[64]	72	1			T930	1		T686	3		T902	1
values[65]	91	1			T930	1		T686	21		T902	1
values[66]	114	1			T930	1		T686	21		T902	1
values[67]	122	1			T930	1		T686	24		T902	1
values[68]	131	1			T930	1		T686	32		T902	1
values[69]	123	1			T930	1		T686	17		T902	1
values[70]	101	1			T930	1		T686	6		T902	1
values[71]	111	1			T930	1		T686	8		T902	1
values[72]	152	1			T930	1		T686	15		T902	1
values[73]	112	1			T930	1		T686	5		T902	1
values[74]	89	1			T930	1		T686	3		T902	1
values[75]	107	1			T930	1		T686	11		T902	1
values[76]	98	1			T930	1		T686	3		T902	1
values[77]	95	1			T930	1		T686	4		T902	1
values[78]	106	1			T930	1		T686	3		T902	1
values[79]	122	1			T930	1		T686	13		T902	5
values[80]	123	1			T930	1		T686	9		T902	4
values[81]	101	1			T930	1		T686	2		T902	2
values[82]	117	1			T930	1		T902	2		T903	1
values[83]	80	1			T930	1		T902	1		T903	1
values[84]	86	1			T930	1		T902	1		T903	1
values[85]	89	1			T930	1		T902	2		T903	2
values[86]	101	1			T930	1		T902	4		T903	1
values[87]	84	1			T930	1		T902	3		T903	1
values[88]	102	1			T930	1		T902	2		T903	1
values[89]	99	1			T930	1		T902	4		T903	1
values[90]	117	1			T930	1		T902	7		T903	1
values[91]	73	1			T930	1		T902	1		T903	1
values[92]	86	1			T930	1		T902	1		T903	1
values[93]	115	1			T930	1		T902	1		T903	1
values[94]	101	1			T930	1		T902	3		T903	1
values[95]	86	1			T930	6		T902	1		T903	1
values[96]	99	1			T930	5		T902	1		T903	1
values[97]	98	1			T930	3		T902	1		T903	1
values[98]	104	1			T930	2		T902	2		T903	1
values[99]	92	1			T930	1		T902	3		T903	1
values[100]	86	1			T930	1		T902	2		T903	1
values[101]	90	1			T930	3		T902	2		T903	1
values[102]	69	1			T930	2		T902	2		T903	1
values[103]	93	1			T930	1		T902	1		T903	1
values[104]	101	1			T930	2		T902	5		T903	1
values[105]	94	1			T930	4		T902	2		T903	1
values[106]	87	1			T930	4		T902	1		T903	1
values[107]	86	1			T930	3		T902	2		T903	1
values[108]	89	1			T930	2		T902	2		T903	1
values[109]	92	1			T930	2		T902	3		T903	1
values[110]	85	1			T930	3		T902	1		T903	1
values[111]	94	1			T930	1		T902	1		T903	1
values[112]	101	1			T930	1		T902	1		T903	1
values[113]	104	1			T930	2		T902	1		T903	1
values[114]	89	1			T930	2		T902	1		T903	1
values[115]	76	1			T930	1		T902	5		T903	1
values[116]	84	1			T930	2		T902	1		T903	1
values[117]	81	1			T930	1		T902	1		T903	1
values[118]	67	1			T930	2		T902	1		T903	1
values[119]	83	1			T930	4		T902	2		T903	1
values[120]	77	1			T930	3		T902	2		T903	1
values[121]	71	1			T930	2		T902	2		T903	1
values[122]	64	1			T930	1		T902	1		T903	1
values[123]	57	1			T930	2		T902	1		T903	1
values[124]	79	1			T930	1		T902	1		T903	1
values[125]	78	1			T930	3		T902	1		T903	1
values[126]	111	1			T930	2		T902	3		T903	5
values[127]	1767	1			T930	70		T902	59		T903	42
values[128]	8608	1			T930	300		T902	308		T903	245