Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.hmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	172359	1			T75	1173		T76	1		T77	3
values[2]	4359	1			T81	2		T130	5		T255	1
values[3]	1961	1			T541	65		T852	1		T855	3
values[4]	1381	1			T541	18		T852	1		T855	7
values[5]	1074	1			T541	15		T855	1		T696	1
values[6]	919	1			T541	3		T855	2		T696	1
values[7]	861	1			T855	4		T696	1		T847	28
values[8]	800	1			T855	5		T696	1		T847	21
values[9]	602	1			T855	1		T696	1		T847	16
values[10]	508	1			T855	1		T696	1		T847	8
values[11]	464	1			T855	3		T696	1		T847	1
values[12]	359	1			T855	4		T696	1		T847	1
values[13]	385	1			T855	4		T696	1		T526	4
values[14]	318	1			T855	2		T696	1		T526	6
values[15]	301	1			T855	2		T696	1		T526	5
values[16]	268	1			T855	1		T696	1		T526	11
values[17]	240	1			T855	2		T696	1		T526	10
values[18]	219	1			T855	7		T696	1		T526	13
values[19]	170	1			T855	1		T696	1		T526	21
values[20]	139	1			T855	1		T696	1		T526	11
values[21]	129	1			T855	2		T696	1		T846	1
values[22]	113	1			T855	3		T696	1		T846	1
values[23]	127	1			T855	2		T696	1		T846	1
values[24]	106	1			T855	2		T696	1		T846	1
values[25]	87	1			T855	1		T696	1		T846	1
values[26]	88	1			T855	3		T696	1		T846	1
values[27]	103	1			T855	5		T696	1		T846	1
values[28]	90	1			T855	2		T696	1		T846	1
values[29]	80	1			T855	4		T696	1		T846	1
values[30]	71	1			T855	7		T696	1		T846	1
values[31]	58	1			T855	5		T696	1		T846	1
values[32]	54	1			T855	1		T696	1		T846	1
values[33]	36	1			T855	2		T696	1		T846	1
values[34]	44	1			T855	3		T696	1		T846	1
values[35]	42	1			T855	2		T696	1		T846	1
values[36]	42	1			T855	1		T696	1		T846	1
values[37]	42	1			T855	1		T696	1		T846	1
values[38]	42	1			T855	4		T696	1		T846	1
values[39]	66	1			T855	6		T696	1		T846	1
values[40]	56	1			T855	8		T696	1		T846	1
values[41]	49	1			T855	5		T696	1		T846	1
values[42]	43	1			T855	4		T696	1		T846	1
values[43]	49	1			T855	1		T696	1		T846	1
values[44]	46	1			T855	1		T696	1		T846	1
values[45]	33	1			T855	1		T696	1		T846	1
values[46]	39	1			T855	1		T696	1		T846	1
values[47]	38	1			T855	2		T696	1		T846	1
values[48]	34	1			T855	2		T696	1		T846	1
values[49]	45	1			T855	3		T696	1		T846	1
values[50]	46	1			T855	1		T696	1		T846	1
values[51]	41	1			T855	2		T696	1		T846	1
values[52]	38	1			T855	1		T696	1		T846	1
values[53]	43	1			T855	3		T696	1		T846	1
values[54]	38	1			T855	5		T696	1		T846	1
values[55]	40	1			T855	3		T696	1		T846	1
values[56]	44	1			T855	1		T696	1		T846	1
values[57]	46	1			T855	3		T696	1		T846	1
values[58]	44	1			T855	2		T696	1		T846	1
values[59]	43	1			T855	2		T696	1		T846	1
values[60]	39	1			T855	2		T696	1		T846	1
values[61]	40	1			T855	2		T696	1		T846	1
values[62]	43	1			T855	2		T696	1		T846	1
values[63]	46	1			T855	1		T696	1		T846	1
values[64]	43	1			T855	1		T696	1		T846	1
values[65]	48	1			T855	2		T696	1		T846	1
values[66]	46	1			T855	1		T696	1		T846	1
values[67]	46	1			T855	2		T696	1		T846	1
values[68]	48	1			T855	3		T696	1		T846	1
values[69]	46	1			T855	1		T696	1		T846	1
values[70]	40	1			T855	1		T696	1		T846	1
values[71]	39	1			T855	3		T696	1		T846	1
values[72]	40	1			T855	1		T696	1		T846	1
values[73]	48	1			T855	5		T696	1		T846	1
values[74]	40	1			T855	4		T696	1		T846	1
values[75]	44	1			T855	4		T696	1		T846	1
values[76]	52	1			T855	5		T696	1		T846	1
values[77]	41	1			T855	2		T696	1		T846	1
values[78]	42	1			T855	2		T696	1		T846	1
values[79]	47	1			T855	3		T696	1		T846	1
values[80]	53	1			T855	3		T696	1		T846	1
values[81]	52	1			T855	5		T696	1		T846	2
values[82]	39	1			T855	5		T696	1		T846	1
values[83]	46	1			T855	2		T696	1		T846	2
values[84]	52	1			T855	6		T696	1		T846	1
values[85]	54	1			T855	9		T696	1		T846	1
values[86]	50	1			T855	7		T696	1		T846	1
values[87]	54	1			T855	1		T696	1		T846	1
values[88]	65	1			T855	3		T696	1		T846	1
values[89]	57	1			T855	3		T696	1		T846	1
values[90]	52	1			T855	2		T696	1		T846	1
values[91]	41	1			T855	1		T696	1		T846	1
values[92]	54	1			T855	1		T696	1		T846	1
values[93]	55	1			T855	2		T696	1		T846	1
values[94]	48	1			T855	1		T696	1		T846	1
values[95]	45	1			T855	3		T696	1		T846	1
values[96]	58	1			T855	2		T696	1		T846	1
values[97]	69	1			T855	3		T696	1		T846	1
values[98]	54	1			T855	2		T696	1		T846	1
values[99]	65	1			T855	5		T696	1		T846	1
values[100]	81	1			T855	8		T696	1		T846	1
values[101]	64	1			T855	4		T696	1		T846	1
values[102]	56	1			T855	2		T696	1		T846	1
values[103]	51	1			T855	3		T696	1		T846	1
values[104]	57	1			T855	2		T696	1		T846	2
values[105]	59	1			T855	3		T696	1		T846	2
values[106]	60	1			T855	1		T696	1		T846	3
values[107]	65	1			T855	3		T696	1		T846	3
values[108]	69	1			T855	7		T696	1		T846	2
values[109]	58	1			T855	3		T696	1		T846	2
values[110]	74	1			T855	4		T696	1		T846	4
values[111]	78	1			T855	3		T696	1		T846	1
values[112]	64	1			T855	5		T696	1		T846	3
values[113]	75	1			T855	3		T696	1		T846	1
values[114]	80	1			T855	2		T696	3		T846	3
values[115]	64	1			T855	4		T696	4		T846	1
values[116]	63	1			T855	6		T696	2		T846	1
values[117]	67	1			T855	7		T696	1		T846	2
values[118]	70	1			T855	7		T696	2		T846	2
values[119]	72	1			T855	4		T696	2		T846	2
values[120]	80	1			T855	10		T696	5		T846	4
values[121]	78	1			T855	4		T696	3		T846	2
values[122]	89	1			T855	9		T696	2		T846	1
values[123]	105	1			T855	15		T696	1		T846	4
values[124]	166	1			T855	17		T696	2		T846	1
values[125]	290	1			T855	35		T696	1		T846	1
values[126]	721	1			T855	41		T696	27		T846	24
values[127]	2526	1			T855	22		T696	125		T846	125
values[128]	4496	1			T855	3		T696	182		T846	223