Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143467	1			T75	652		T77	6		T81	23
values[2]	7667	1			T75	8		T81	4		T130	8
values[3]	2427	1			T75	14		T537	3		T541	1
values[4]	1489	1			T75	21		T537	1		T696	1
values[5]	1053	1			T75	23		T537	9		T696	1
values[6]	678	1			T75	10		T537	4		T696	1
values[7]	519	1			T75	6		T537	4		T696	1
values[8]	489	1			T75	12		T537	2		T696	1
values[9]	468	1			T75	17		T537	3		T696	1
values[10]	402	1			T75	30		T537	2		T696	1
values[11]	390	1			T75	10		T537	1		T696	1
values[12]	446	1			T75	23		T537	1		T696	1
values[13]	443	1			T75	9		T537	7		T696	1
values[14]	342	1			T75	6		T537	6		T696	1
values[15]	351	1			T75	11		T537	4		T696	1
values[16]	406	1			T75	12		T537	8		T696	1
values[17]	372	1			T75	24		T537	4		T696	1
values[18]	347	1			T75	20		T537	3		T696	1
values[19]	370	1			T75	9		T537	7		T696	1
values[20]	341	1			T75	12		T537	5		T696	1
values[21]	343	1			T75	12		T537	5		T696	1
values[22]	371	1			T75	16		T537	4		T696	1
values[23]	414	1			T75	23		T537	14		T696	1
values[24]	329	1			T75	9		T537	4		T696	1
values[25]	338	1			T75	14		T537	1		T696	1
values[26]	370	1			T75	21		T537	2		T696	1
values[27]	405	1			T75	17		T537	2		T696	1
values[28]	349	1			T75	14		T537	4		T696	1
values[29]	333	1			T75	14		T537	4		T696	1
values[30]	392	1			T75	22		T537	1		T696	1
values[31]	347	1			T75	23		T537	3		T696	1
values[32]	329	1			T75	10		T537	4		T696	1
values[33]	366	1			T75	10		T537	4		T696	1
values[34]	346	1			T75	9		T537	1		T696	1
values[35]	341	1			T75	16		T537	2		T696	1
values[36]	369	1			T75	10		T537	8		T696	1
values[37]	337	1			T75	10		T537	2		T696	1
values[38]	334	1			T75	11		T537	3		T696	1
values[39]	316	1			T75	12		T537	3		T696	1
values[40]	331	1			T75	10		T537	5		T696	1
values[41]	352	1			T75	22		T537	8		T696	1
values[42]	366	1			T75	16		T537	4		T696	1
values[43]	334	1			T75	17		T537	4		T696	1
values[44]	323	1			T75	15		T537	1		T696	1
values[45]	293	1			T75	18		T537	2		T696	1
values[46]	379	1			T75	23		T537	3		T696	1
values[47]	370	1			T75	28		T537	1		T696	1
values[48]	337	1			T75	26		T537	1		T696	1
values[49]	351	1			T75	22		T537	3		T696	1
values[50]	334	1			T75	8		T537	1		T696	1
values[51]	310	1			T75	21		T537	2		T696	1
values[52]	306	1			T75	10		T537	1		T696	1
values[53]	261	1			T75	13		T537	2		T696	1
values[54]	307	1			T75	13		T537	9		T696	1
values[55]	254	1			T75	18		T537	3		T696	1
values[56]	276	1			T75	15		T537	3		T696	1
values[57]	307	1			T75	12		T537	5		T696	1
values[58]	260	1			T75	14		T537	1		T696	1
values[59]	308	1			T75	26		T537	1		T696	1
values[60]	288	1			T75	18		T537	1		T696	2
values[61]	302	1			T75	8		T537	4		T696	1
values[62]	237	1			T75	10		T537	4		T696	1
values[63]	219	1			T75	8		T537	6		T696	1
values[64]	218	1			T75	13		T537	4		T696	1
values[65]	263	1			T75	27		T537	1		T696	1
values[66]	250	1			T75	6		T537	4		T696	1
values[67]	230	1			T75	5		T537	6		T696	1
values[68]	209	1			T75	9		T537	3		T696	1
values[69]	185	1			T537	8		T696	1		T854	7
values[70]	142	1			T537	3		T696	1		T854	10
values[71]	151	1			T537	4		T696	1		T854	13
values[72]	128	1			T537	16		T696	1		T854	11
values[73]	95	1			T537	17		T696	1		T854	3
values[74]	106	1			T537	18		T696	1		T508	1
values[75]	105	1			T537	16		T696	1		T508	1
values[76]	91	1			T537	4		T696	1		T508	1
values[77]	69	1			T537	1		T696	1		T508	1
values[78]	65	1			T537	4		T696	2		T508	1
values[79]	84	1			T537	14		T696	4		T508	1
values[80]	68	1			T537	4		T696	2		T508	1
values[81]	104	1			T537	2		T696	10		T508	1
values[82]	88	1			T537	6		T696	4		T508	1
values[83]	94	1			T537	6		T696	5		T508	1
values[84]	74	1			T537	6		T696	5		T508	1
values[85]	98	1			T537	4		T696	12		T508	1
values[86]	85	1			T696	2		T508	1		T841	1
values[87]	59	1			T696	2		T508	1		T841	1
values[88]	71	1			T696	1		T508	1		T841	1
values[89]	84	1			T696	1		T508	1		T841	1
values[90]	88	1			T696	2		T508	1		T841	1
values[91]	105	1			T696	2		T508	1		T841	1
values[92]	108	1			T696	1		T508	1		T841	1
values[93]	90	1			T696	1		T508	1		T841	1
values[94]	95	1			T696	3		T508	1		T841	1
values[95]	109	1			T696	3		T508	1		T841	1
values[96]	83	1			T696	3		T508	1		T841	1
values[97]	115	1			T696	1		T508	1		T841	1
values[98]	115	1			T696	1		T508	1		T841	1
values[99]	96	1			T696	2		T508	1		T841	1
values[100]	83	1			T696	1		T508	1		T841	1
values[101]	101	1			T696	3		T508	1		T841	1
values[102]	90	1			T696	3		T508	1		T841	1
values[103]	96	1			T696	3		T508	1		T841	1
values[104]	91	1			T696	3		T508	1		T841	1
values[105]	98	1			T696	4		T508	1		T841	1
values[106]	90	1			T696	4		T508	1		T841	1
values[107]	86	1			T696	7		T508	1		T841	1
values[108]	85	1			T696	7		T508	1		T841	1
values[109]	101	1			T696	2		T508	1		T841	1
values[110]	103	1			T696	4		T508	1		T841	2
values[111]	85	1			T696	1		T508	1		T841	5
values[112]	98	1			T696	3		T508	1		T841	3
values[113]	88	1			T696	3		T508	5		T841	1
values[114]	81	1			T696	1		T508	2		T841	2
values[115]	85	1			T696	1		T508	4		T841	3
values[116]	102	1			T696	3		T508	3		T841	1
values[117]	75	1			T696	2		T508	1		T841	3
values[118]	69	1			T696	2		T508	1		T841	1
values[119]	107	1			T696	1		T508	2		T841	1
values[120]	69	1			T696	1		T508	5		T841	1
values[121]	65	1			T696	3		T508	2		T841	2
values[122]	75	1			T696	3		T508	5		T841	2
values[123]	59	1			T696	1		T508	1		T841	1
values[124]	70	1			T696	2		T508	1		T841	1
values[125]	76	1			T696	5		T508	2		T841	1
values[126]	90	1			T696	4		T508	1		T841	4
values[127]	893	1			T696	21		T508	27		T841	37
values[128]	8337	1			T696	250		T508	386		T841	337