Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.otp_ctrl__prim_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	144794	1			T75	685		T76	3		T77	5
values[2]	8179	1			T75	7		T81	2		T130	140
values[3]	2884	1			T75	8		T130	24		T503	18
values[4]	1750	1			T75	9		T130	12		T503	14
values[5]	1043	1			T75	6		T130	5		T503	4
values[6]	702	1			T75	7		T503	11		T542	1
values[7]	539	1			T75	8		T503	3		T542	1
values[8]	496	1			T75	9		T503	7		T542	1
values[9]	416	1			T75	6		T503	17		T542	1
values[10]	417	1			T75	4		T503	5		T542	1
values[11]	381	1			T75	8		T503	9		T542	1
values[12]	366	1			T75	4		T542	1		T473	7
values[13]	387	1			T75	15		T542	1		T473	5
values[14]	377	1			T75	7		T542	1		T473	5
values[15]	331	1			T75	9		T542	1		T473	9
values[16]	325	1			T75	9		T542	1		T473	4
values[17]	365	1			T75	7		T542	1		T473	14
values[18]	386	1			T75	7		T542	1		T473	7
values[19]	358	1			T75	13		T542	1		T473	7
values[20]	337	1			T75	3		T542	1		T473	9
values[21]	340	1			T75	6		T542	1		T473	8
values[22]	367	1			T75	9		T542	1		T473	5
values[23]	357	1			T75	4		T542	1		T473	3
values[24]	348	1			T75	3		T542	1		T473	9
values[25]	330	1			T75	11		T542	1		T473	11
values[26]	368	1			T75	17		T542	1		T473	7
values[27]	346	1			T75	14		T542	1		T473	6
values[28]	433	1			T75	7		T542	1		T473	16
values[29]	333	1			T75	6		T542	1		T473	9
values[30]	352	1			T75	5		T542	1		T473	12
values[31]	334	1			T75	9		T542	1		T473	5
values[32]	337	1			T75	5		T542	1		T473	14
values[33]	314	1			T75	18		T542	1		T473	9
values[34]	311	1			T75	6		T542	1		T473	4
values[35]	328	1			T75	13		T542	1		T473	6
values[36]	374	1			T75	6		T542	1		T473	3
values[37]	336	1			T75	5		T542	1		T473	8
values[38]	375	1			T75	6		T542	1		T473	22
values[39]	307	1			T75	5		T542	1		T473	8
values[40]	299	1			T75	7		T542	1		T473	7
values[41]	302	1			T75	6		T542	1		T473	6
values[42]	316	1			T75	3		T542	1		T473	15
values[43]	241	1			T75	4		T542	1		T473	7
values[44]	307	1			T75	6		T542	1		T473	4
values[45]	329	1			T75	10		T542	1		T473	6
values[46]	315	1			T75	9		T542	1		T473	7
values[47]	336	1			T75	7		T542	1		T473	5
values[48]	290	1			T75	8		T542	1		T473	7
values[49]	254	1			T542	1		T473	8		T850	1
values[50]	269	1			T542	1		T473	12		T850	1
values[51]	267	1			T542	1		T473	4		T850	1
values[52]	270	1			T542	1		T473	4		T850	1
values[53]	277	1			T542	1		T473	4		T850	1
values[54]	315	1			T542	1		T473	5		T850	1
values[55]	285	1			T542	1		T473	3		T850	1
values[56]	265	1			T542	1		T473	8		T850	1
values[57]	286	1			T542	1		T473	6		T850	1
values[58]	308	1			T542	1		T473	5		T850	1
values[59]	337	1			T542	1		T473	12		T850	1
values[60]	240	1			T542	1		T473	8		T850	1
values[61]	269	1			T542	1		T473	4		T850	1
values[62]	275	1			T542	2		T850	1		T843	1
values[63]	217	1			T542	1		T850	1		T843	1
values[64]	210	1			T542	1		T850	1		T843	1
values[65]	189	1			T542	1		T850	1		T843	1
values[66]	147	1			T542	1		T850	1		T843	2
values[67]	153	1			T542	1		T850	1		T843	1
values[68]	123	1			T542	1		T850	2		T843	1
values[69]	114	1			T542	1		T850	1		T843	1
values[70]	129	1			T542	1		T850	1		T843	1
values[71]	134	1			T542	1		T850	1		T843	1
values[72]	121	1			T542	2		T850	1		T843	1
values[73]	120	1			T542	5		T850	1		T843	1
values[74]	110	1			T542	5		T850	1		T843	1
values[75]	98	1			T542	3		T850	1		T843	1
values[76]	88	1			T542	3		T850	1		T843	1
values[77]	91	1			T542	2		T850	1		T843	1
values[78]	77	1			T542	5		T850	1		T843	1
values[79]	95	1			T542	2		T850	1		T843	1
values[80]	88	1			T542	2		T850	1		T843	1
values[81]	61	1			T542	1		T850	1		T843	1
values[82]	62	1			T542	1		T850	1		T843	1
values[83]	49	1			T542	2		T850	1		T843	1
values[84]	57	1			T542	1		T850	1		T843	1
values[85]	48	1			T542	3		T850	1		T843	1
values[86]	70	1			T542	3		T850	1		T843	1
values[87]	78	1			T542	4		T850	1		T843	1
values[88]	62	1			T542	2		T850	1		T843	1
values[89]	83	1			T542	3		T850	1		T843	1
values[90]	66	1			T542	1		T850	1		T843	1
values[91]	83	1			T542	2		T850	1		T843	1
values[92]	87	1			T542	1		T850	1		T843	1
values[93]	70	1			T542	1		T850	1		T843	1
values[94]	60	1			T542	8		T850	1		T843	1
values[95]	61	1			T542	4		T850	1		T843	1
values[96]	68	1			T542	6		T850	3		T843	1
values[97]	63	1			T542	3		T850	2		T843	1
values[98]	67	1			T542	1		T850	9		T843	1
values[99]	51	1			T542	3		T850	1		T843	1
values[100]	62	1			T542	1		T850	3		T843	1
values[101]	62	1			T542	2		T850	6		T843	1
values[102]	39	1			T542	4		T850	2		T843	1
values[103]	52	1			T542	1		T850	2		T843	1
values[104]	67	1			T542	1		T850	1		T843	1
values[105]	53	1			T542	2		T850	2		T843	1
values[106]	45	1			T542	2		T850	1		T843	1
values[107]	43	1			T542	2		T850	2		T843	1
values[108]	50	1			T542	4		T850	1		T843	1
values[109]	40	1			T542	1		T850	4		T843	1
values[110]	41	1			T542	1		T850	3		T843	1
values[111]	43	1			T542	1		T850	3		T843	4
values[112]	53	1			T542	2		T850	1		T843	2
values[113]	43	1			T542	1		T850	1		T843	1
values[114]	45	1			T542	2		T850	4		T843	2
values[115]	45	1			T542	1		T850	1		T843	2
values[116]	35	1			T542	4		T850	1		T843	4
values[117]	39	1			T542	1		T850	2		T843	1
values[118]	37	1			T542	2		T850	3		T843	3
values[119]	39	1			T542	1		T850	1		T843	1
values[120]	56	1			T542	3		T850	5		T843	1
values[121]	46	1			T542	1		T850	1		T843	2
values[122]	40	1			T542	1		T850	1		T843	2
values[123]	58	1			T542	1		T850	2		T843	5
values[124]	50	1			T542	6		T850	1		T843	6
values[125]	52	1			T542	2		T850	2		T843	3
values[126]	133	1			T542	3		T850	2		T843	2
values[127]	613	1			T542	36		T850	28		T843	27
values[128]	4771	1			T542	312		T850	303		T843	364