Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	153080	1			T75	1082		T76	3		T77	10
values[2]	9578	1			T75	51		T130	92		T255	2
values[3]	2904	1			T75	7		T130	17		T474	1
values[4]	1701	1			T75	5		T130	10		T473	34
values[5]	1118	1			T75	3		T130	11		T473	29
values[6]	807	1			T130	10		T473	20		T468	11
values[7]	669	1			T130	5		T473	16		T468	5
values[8]	523	1			T130	8		T473	6		T468	3
values[9]	519	1			T130	2		T473	10		T468	3
values[10]	418	1			T130	5		T473	5		T468	4
values[11]	444	1			T130	5		T473	12		T468	2
values[12]	445	1			T130	4		T473	9		T468	1
values[13]	371	1			T473	9		T468	3		T508	1
values[14]	341	1			T473	9		T468	7		T508	1
values[15]	363	1			T473	13		T468	2		T508	1
values[16]	367	1			T473	7		T468	1		T508	1
values[17]	371	1			T473	7		T468	4		T508	1
values[18]	376	1			T473	8		T468	8		T508	1
values[19]	324	1			T473	14		T468	5		T508	1
values[20]	321	1			T473	9		T468	5		T508	1
values[21]	374	1			T473	8		T468	3		T508	1
values[22]	309	1			T473	6		T468	5		T508	1
values[23]	288	1			T473	10		T468	9		T508	1
values[24]	324	1			T473	6		T468	9		T508	1
values[25]	320	1			T473	6		T468	2		T508	1
values[26]	333	1			T473	6		T508	1		T488	5
values[27]	301	1			T473	6		T508	1		T488	5
values[28]	311	1			T473	5		T508	2		T488	4
values[29]	280	1			T473	3		T508	1		T488	4
values[30]	279	1			T473	3		T508	1		T488	4
values[31]	249	1			T473	7		T508	1		T488	3
values[32]	316	1			T473	5		T508	1		T488	3
values[33]	311	1			T473	15		T508	1		T488	5
values[34]	315	1			T473	11		T508	1		T488	15
values[35]	307	1			T473	18		T508	1		T488	3
values[36]	337	1			T473	24		T508	1		T488	3
values[37]	277	1			T473	6		T508	1		T488	7
values[38]	294	1			T473	6		T508	1		T488	14
values[39]	316	1			T473	8		T508	1		T488	10
values[40]	286	1			T473	7		T508	1		T488	16
values[41]	270	1			T473	12		T508	1		T488	10
values[42]	228	1			T473	10		T508	1		T488	4
values[43]	276	1			T473	7		T508	2		T488	3
values[44]	277	1			T473	11		T508	1		T488	4
values[45]	276	1			T473	11		T508	1		T488	4
values[46]	273	1			T473	11		T508	2		T488	5
values[47]	222	1			T473	5		T508	1		T488	11
values[48]	249	1			T473	8		T508	1		T488	24
values[49]	304	1			T473	11		T508	1		T488	18
values[50]	281	1			T473	5		T508	1		T488	3
values[51]	226	1			T473	5		T508	1		T488	3
values[52]	283	1			T473	8		T508	1		T488	7
values[53]	259	1			T473	2		T508	1		T488	4
values[54]	268	1			T473	8		T508	1		T488	11
values[55]	235	1			T473	5		T508	1		T488	8
values[56]	269	1			T473	4		T508	1		T488	13
values[57]	222	1			T473	10		T508	1		T488	2
values[58]	179	1			T473	3		T508	1		T488	5
values[59]	176	1			T473	10		T508	1		T488	6
values[60]	191	1			T473	3		T508	1		T488	11
values[61]	184	1			T473	11		T508	1		T488	7
values[62]	183	1			T473	5		T508	1		T488	5
values[63]	158	1			T473	6		T508	1		T488	3
values[64]	172	1			T473	4		T508	1		T488	6
values[65]	158	1			T473	7		T508	1		T488	3
values[66]	205	1			T473	4		T508	1		T488	5
values[67]	133	1			T508	1		T488	5		T498	1
values[68]	113	1			T508	1		T488	6		T498	1
values[69]	131	1			T508	1		T488	13		T498	1
values[70]	93	1			T508	1		T498	1		T482	6
values[71]	86	1			T508	1		T498	1		T482	3
values[72]	70	1			T508	1		T498	1		T482	2
values[73]	64	1			T508	1		T498	1		T482	3
values[74]	57	1			T508	1		T498	1		T482	1
values[75]	46	1			T508	1		T498	1		T482	2
values[76]	50	1			T508	1		T498	1		T482	4
values[77]	62	1			T508	1		T498	1		T482	2
values[78]	50	1			T508	1		T498	1		T482	5
values[79]	63	1			T508	1		T498	1		T482	18
values[80]	79	1			T508	1		T498	1		T482	14
values[81]	62	1			T508	1		T498	1		T482	7
values[82]	52	1			T508	1		T498	1		T482	3
values[83]	56	1			T508	1		T498	1		T482	2
values[84]	49	1			T508	1		T498	1		T482	3
values[85]	73	1			T508	1		T498	1		T482	6
values[86]	57	1			T508	1		T498	1		T482	4
values[87]	50	1			T508	1		T498	1		T482	2
values[88]	60	1			T508	1		T498	1		T482	1
values[89]	60	1			T508	1		T498	1		T482	2
values[90]	63	1			T508	1		T498	1		T482	4
values[91]	60	1			T508	1		T498	1		T482	4
values[92]	58	1			T508	1		T498	1		T482	5
values[93]	64	1			T508	1		T498	1		T482	1
values[94]	82	1			T508	1		T498	1		T482	4
values[95]	60	1			T508	1		T498	1		T482	2
values[96]	59	1			T508	1		T498	1		T482	2
values[97]	66	1			T508	1		T498	1		T482	3
values[98]	80	1			T508	1		T498	1		T482	1
values[99]	70	1			T508	1		T498	1		T482	1
values[100]	58	1			T508	1		T498	1		T482	2
values[101]	66	1			T508	1		T498	1		T482	4
values[102]	78	1			T508	1		T498	1		T482	2
values[103]	79	1			T508	1		T498	1		T482	1
values[104]	79	1			T508	1		T498	1		T482	2
values[105]	68	1			T508	1		T498	1		T482	4
values[106]	62	1			T508	1		T498	1		T482	3
values[107]	73	1			T508	1		T498	1		T482	2
values[108]	64	1			T508	1		T498	1		T482	1
values[109]	58	1			T508	1		T498	1		T482	3
values[110]	66	1			T508	1		T498	2		T482	7
values[111]	68	1			T508	1		T498	3		T482	3
values[112]	59	1			T508	1		T498	4		T482	2
values[113]	47	1			T508	1		T498	1		T482	5
values[114]	58	1			T508	1		T498	6		T482	4
values[115]	71	1			T508	1		T498	1		T482	8
values[116]	69	1			T508	1		T498	1		T482	9
values[117]	68	1			T508	1		T498	2		T482	5
values[118]	61	1			T508	1		T498	3		T482	6
values[119]	66	1			T508	1		T498	1		T482	6
values[120]	50	1			T508	1		T498	2		T482	4
values[121]	48	1			T508	1		T498	7		T482	2
values[122]	62	1			T508	1		T498	2		T482	5
values[123]	55	1			T508	3		T498	1		T482	1
values[124]	46	1			T508	2		T498	1		T482	2
values[125]	65	1			T508	2		T498	3		T482	12
values[126]	122	1			T508	2		T498	2		T482	6
values[127]	754	1			T508	31		T498	26		T482	12
values[128]	6758	1			T508	377		T498	265		T482	3