Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cfg_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	171818	1			T75	1232		T76	3		T77	6
values[2]	4639	1			T130	114		T463	2		T766	2
values[3]	2250	1			T130	29		T537	1		T566	1
values[4]	1479	1			T130	8		T537	3		T696	1
values[5]	1247	1			T130	14		T537	3		T696	1
values[6]	983	1			T130	22		T537	1		T696	1
values[7]	934	1			T130	18		T537	1		T696	1
values[8]	749	1			T130	11		T537	2		T696	1
values[9]	696	1			T130	3		T537	7		T696	1
values[10]	677	1			T130	7		T537	1		T696	1
values[11]	525	1			T537	4		T696	1		T685	1
values[12]	498	1			T537	2		T696	1		T526	1
values[13]	452	1			T537	4		T696	1		T526	2
values[14]	439	1			T537	2		T696	1		T526	5
values[15]	440	1			T537	2		T696	1		T526	6
values[16]	444	1			T537	1		T696	1		T526	5
values[17]	420	1			T537	4		T696	1		T526	3
values[18]	383	1			T537	1		T696	1		T526	2
values[19]	356	1			T537	1		T696	1		T526	2
values[20]	327	1			T537	4		T696	1		T526	3
values[21]	244	1			T537	4		T696	1		T526	1
values[22]	230	1			T537	1		T696	1		T526	3
values[23]	185	1			T537	1		T696	1		T526	3
values[24]	267	1			T537	4		T696	1		T526	2
values[25]	269	1			T537	4		T696	1		T526	2
values[26]	225	1			T537	3		T696	1		T526	4
values[27]	256	1			T537	1		T696	1		T526	2
values[28]	192	1			T537	2		T696	1		T526	5
values[29]	160	1			T537	2		T696	1		T526	2
values[30]	131	1			T537	1		T696	1		T526	2
values[31]	132	1			T537	4		T696	1		T526	1
values[32]	178	1			T537	4		T696	1		T526	3
values[33]	140	1			T537	1		T696	1		T526	2
values[34]	115	1			T537	1		T696	1		T526	1
values[35]	108	1			T537	4		T696	1		T526	2
values[36]	136	1			T537	2		T696	1		T526	1
values[37]	123	1			T537	1		T696	1		T526	4
values[38]	116	1			T537	6		T696	1		T526	2
values[39]	101	1			T537	1		T696	1		T526	4
values[40]	83	1			T537	1		T696	1		T526	3
values[41]	75	1			T537	2		T696	1		T526	2
values[42]	84	1			T537	3		T696	1		T526	1
values[43]	90	1			T537	1		T696	1		T526	2
values[44]	98	1			T537	1		T696	1		T526	2
values[45]	82	1			T537	4		T696	1		T526	4
values[46]	73	1			T537	2		T696	1		T526	2
values[47]	71	1			T537	1		T696	1		T526	2
values[48]	64	1			T537	2		T696	1		T526	1
values[49]	67	1			T537	4		T696	1		T526	2
values[50]	82	1			T537	7		T696	1		T526	2
values[51]	81	1			T537	6		T696	1		T526	2
values[52]	88	1			T537	5		T696	2		T526	2
values[53]	94	1			T537	2		T696	1		T526	3
values[54]	85	1			T537	2		T696	1		T526	2
values[55]	80	1			T537	3		T696	1		T526	1
values[56]	94	1			T537	4		T696	1		T526	2
values[57]	84	1			T537	2		T696	1		T526	3
values[58]	79	1			T537	2		T696	1		T526	4
values[59]	64	1			T537	3		T696	1		T526	1
values[60]	60	1			T537	3		T696	1		T526	2
values[61]	67	1			T537	4		T696	1		T526	2
values[62]	66	1			T537	6		T696	1		T526	1
values[63]	69	1			T537	2		T696	1		T526	1
values[64]	65	1			T537	4		T696	1		T526	5
values[65]	73	1			T537	1		T696	1		T526	4
values[66]	76	1			T537	1		T696	1		T526	5
values[67]	71	1			T537	5		T696	1		T526	3
values[68]	74	1			T537	3		T696	1		T526	1
values[69]	62	1			T537	3		T696	1		T526	3
values[70]	70	1			T537	5		T696	1		T526	2
values[71]	80	1			T537	4		T696	1		T526	1
values[72]	68	1			T537	2		T696	1		T526	2
values[73]	67	1			T537	3		T696	1		T526	5
values[74]	72	1			T537	2		T696	1		T526	8
values[75]	72	1			T537	2		T696	1		T526	2
values[76]	82	1			T537	2		T696	1		T526	3
values[77]	104	1			T537	2		T696	1		T526	2
values[78]	76	1			T537	2		T696	1		T526	1
values[79]	74	1			T537	2		T696	1		T526	1
values[80]	79	1			T537	1		T696	1		T526	1
values[81]	84	1			T537	2		T696	1		T526	3
values[82]	76	1			T537	4		T696	1		T526	4
values[83]	75	1			T537	3		T696	1		T526	5
values[84]	84	1			T537	3		T696	1		T526	5
values[85]	85	1			T537	1		T696	1		T526	2
values[86]	83	1			T537	4		T696	1		T526	1
values[87]	91	1			T537	4		T696	1		T526	4
values[88]	106	1			T537	7		T696	1		T526	7
values[89]	101	1			T537	3		T696	1		T526	10
values[90]	101	1			T537	1		T696	1		T526	5
values[91]	87	1			T537	3		T696	1		T526	4
values[92]	85	1			T537	1		T696	1		T526	2
values[93]	81	1			T537	1		T696	1		T526	2
values[94]	98	1			T537	5		T696	1		T526	5
values[95]	103	1			T537	4		T696	2		T526	6
values[96]	89	1			T537	4		T696	1		T526	4
values[97]	103	1			T537	7		T696	1		T526	2
values[98]	103	1			T537	8		T696	1		T526	3
values[99]	108	1			T537	3		T696	1		T526	1
values[100]	124	1			T537	4		T696	1		T526	3
values[101]	126	1			T537	4		T696	1		T526	3
values[102]	100	1			T537	3		T696	1		T526	3
values[103]	90	1			T537	3		T696	1		T526	5
values[104]	87	1			T537	4		T696	1		T526	3
values[105]	128	1			T537	5		T696	1		T526	2
values[106]	106	1			T537	4		T696	1		T526	4
values[107]	102	1			T537	4		T696	1		T526	3
values[108]	96	1			T537	3		T696	1		T526	1
values[109]	112	1			T537	3		T696	1		T526	4
values[110]	108	1			T537	3		T696	1		T526	4
values[111]	132	1			T537	3		T696	1		T526	5
values[112]	114	1			T537	3		T696	1		T526	3
values[113]	128	1			T537	4		T696	3		T526	7
values[114]	118	1			T537	2		T696	1		T526	4
values[115]	117	1			T537	1		T696	3		T526	4
values[116]	112	1			T537	3		T696	2		T526	6
values[117]	117	1			T537	4		T696	2		T526	4
values[118]	102	1			T537	2		T696	1		T526	3
values[119]	118	1			T537	2		T696	5		T526	4
values[120]	137	1			T537	6		T696	7		T526	6
values[121]	138	1			T537	11		T696	5		T526	5
values[122]	139	1			T537	6		T696	2		T526	8
values[123]	154	1			T537	4		T696	1		T526	8
values[124]	237	1			T537	7		T696	3		T526	23
values[125]	425	1			T537	23		T696	1		T526	41
values[126]	1087	1			T537	52		T696	30		T526	46
values[127]	3879	1			T537	31		T696	159		T526	30
values[128]	6639	1			T537	3		T696	197		T526	7