Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_timer_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	151121	1			T75	658		T76	1		T77	2
values[2]	10233	1			T75	2		T81	1		T130	6
values[3]	3453	1			T254	5		T503	51		T473	21
values[4]	2047	1			T254	8		T503	40		T473	14
values[5]	1357	1			T254	16		T503	18		T473	18
values[6]	1014	1			T254	10		T503	18		T473	14
values[7]	667	1			T254	6		T503	19		T473	14
values[8]	567	1			T254	6		T503	13		T473	17
values[9]	504	1			T254	6		T503	4		T473	12
values[10]	432	1			T254	3		T503	7		T473	11
values[11]	373	1			T254	3		T503	2		T473	18
values[12]	374	1			T254	15		T473	16		T842	1
values[13]	305	1			T254	3		T473	8		T842	1
values[14]	337	1			T254	9		T473	13		T842	1
values[15]	371	1			T254	10		T473	18		T842	1
values[16]	383	1			T254	7		T473	13		T842	1
values[17]	350	1			T254	5		T473	16		T842	1
values[18]	316	1			T254	3		T473	13		T842	1
values[19]	338	1			T254	6		T473	14		T842	1
values[20]	297	1			T254	3		T473	10		T842	1
values[21]	335	1			T254	14		T473	31		T842	1
values[22]	340	1			T254	5		T473	19		T842	1
values[23]	303	1			T254	8		T473	12		T842	1
values[24]	354	1			T254	8		T473	15		T842	1
values[25]	291	1			T254	10		T473	9		T842	1
values[26]	283	1			T254	7		T473	12		T842	1
values[27]	325	1			T254	3		T473	13		T842	1
values[28]	270	1			T254	7		T473	11		T842	1
values[29]	271	1			T254	7		T473	15		T842	1
values[30]	258	1			T254	5		T473	12		T842	1
values[31]	299	1			T254	14		T473	16		T842	1
values[32]	304	1			T254	4		T473	25		T842	1
values[33]	305	1			T254	8		T473	11		T842	1
values[34]	275	1			T254	5		T473	24		T842	1
values[35]	288	1			T254	8		T473	11		T842	1
values[36]	321	1			T254	8		T473	13		T842	1
values[37]	307	1			T254	4		T473	7		T842	1
values[38]	268	1			T254	10		T473	20		T842	1
values[39]	277	1			T254	3		T473	17		T842	1
values[40]	333	1			T254	11		T473	18		T842	1
values[41]	311	1			T254	6		T473	24		T842	1
values[42]	290	1			T254	3		T473	21		T842	1
values[43]	344	1			T254	7		T473	13		T842	1
values[44]	316	1			T254	7		T473	11		T842	1
values[45]	262	1			T254	7		T473	4		T842	1
values[46]	280	1			T254	8		T473	10		T842	1
values[47]	255	1			T254	3		T473	4		T842	1
values[48]	269	1			T254	4		T473	4		T842	1
values[49]	320	1			T254	13		T473	9		T842	1
values[50]	288	1			T254	10		T473	5		T842	1
values[51]	269	1			T254	3		T473	5		T842	1
values[52]	236	1			T254	4		T473	3		T842	1
values[53]	275	1			T254	13		T473	6		T842	1
values[54]	271	1			T254	10		T473	6		T842	1
values[55]	280	1			T254	5		T473	11		T842	1
values[56]	259	1			T254	3		T473	10		T842	1
values[57]	228	1			T254	8		T473	10		T842	1
values[58]	259	1			T254	23		T473	16		T842	1
values[59]	203	1			T254	5		T473	4		T842	1
values[60]	205	1			T254	7		T473	7		T842	1
values[61]	192	1			T254	4		T473	9		T842	1
values[62]	178	1			T254	4		T842	1		T526	5
values[63]	181	1			T254	7		T842	1		T526	2
values[64]	198	1			T254	2		T842	1		T526	2
values[65]	161	1			T842	1		T526	2		T487	9
values[66]	114	1			T842	1		T526	10		T487	3
values[67]	127	1			T842	1		T526	8		T487	8
values[68]	139	1			T842	1		T526	16		T487	3
values[69]	108	1			T842	1		T526	8		T487	3
values[70]	164	1			T842	1		T526	24		T867	8
values[71]	129	1			T842	1		T526	12		T867	4
values[72]	123	1			T842	1		T526	12		T867	6
values[73]	115	1			T842	1		T526	19		T867	5
values[74]	95	1			T842	1		T526	8		T867	5
values[75]	89	1			T842	1		T526	13		T849	1
values[76]	84	1			T842	1		T526	9		T849	1
values[77]	76	1			T842	1		T526	4		T849	1
values[78]	73	1			T842	1		T526	6		T849	1
values[79]	83	1			T842	1		T526	5		T849	1
values[80]	72	1			T842	1		T526	5		T849	1
values[81]	80	1			T842	1		T526	5		T849	1
values[82]	82	1			T842	1		T526	4		T849	1
values[83]	79	1			T842	1		T526	3		T849	1
values[84]	87	1			T842	1		T526	6		T849	1
values[85]	75	1			T842	1		T526	2		T849	1
values[86]	70	1			T842	1		T526	7		T849	1
values[87]	67	1			T842	1		T526	7		T849	1
values[88]	66	1			T842	1		T526	3		T849	1
values[89]	73	1			T842	1		T526	7		T849	1
values[90]	82	1			T842	1		T526	3		T849	1
values[91]	89	1			T842	1		T526	8		T849	2
values[92]	77	1			T842	1		T526	4		T849	1
values[93]	89	1			T842	1		T526	11		T849	1
values[94]	89	1			T842	1		T526	11		T849	1
values[95]	68	1			T842	1		T526	6		T849	5
values[96]	69	1			T842	1		T526	5		T849	1
values[97]	81	1			T842	1		T526	1		T849	1
values[98]	67	1			T842	1		T849	3		T868	1
values[99]	71	1			T842	1		T849	3		T868	1
values[100]	66	1			T842	1		T849	4		T868	1
values[101]	86	1			T842	2		T849	9		T868	1
values[102]	60	1			T842	5		T849	1		T868	1
values[103]	52	1			T842	1		T849	1		T868	1
values[104]	62	1			T842	5		T849	1		T868	1
values[105]	50	1			T842	1		T849	1		T868	1
values[106]	64	1			T842	1		T849	3		T868	1
values[107]	65	1			T842	5		T849	2		T868	1
values[108]	63	1			T842	1		T849	2		T868	1
values[109]	51	1			T842	1		T849	1		T868	1
values[110]	62	1			T842	1		T849	2		T868	1
values[111]	71	1			T842	1		T849	1		T868	1
values[112]	55	1			T842	2		T849	1		T868	1
values[113]	57	1			T842	1		T849	2		T868	1
values[114]	70	1			T842	1		T849	1		T868	1
values[115]	60	1			T842	2		T849	1		T868	1
values[116]	65	1			T842	2		T849	2		T868	1
values[117]	48	1			T842	3		T849	1		T868	1
values[118]	73	1			T842	5		T849	3		T868	1
values[119]	58	1			T842	5		T849	2		T868	1
values[120]	52	1			T842	1		T849	2		T868	1
values[121]	60	1			T842	1		T849	1		T868	1
values[122]	54	1			T842	3		T849	2		T868	1
values[123]	48	1			T842	2		T849	5		T868	1
values[124]	56	1			T842	2		T849	5		T868	1
values[125]	65	1			T842	1		T849	2		T868	1
values[126]	137	1			T842	1		T849	5		T868	4
values[127]	871	1			T842	31		T849	45		T868	49
values[128]	6712	1			T842	283		T849	314		T868	386