Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141012	1			T75	995		T76	4		T77	7
values[2]	8449	1			T75	38		T130	5		T439	1
values[3]	3510	1			T75	1		T537	2		T540	13
values[4]	2103	1			T537	1		T540	6		T541	1
values[5]	1377	1			T537	5		T845	1		T696	1
values[6]	919	1			T537	2		T845	1		T696	1
values[7]	691	1			T537	3		T845	1		T696	1
values[8]	582	1			T537	1		T845	1		T696	1
values[9]	630	1			T537	3		T845	1		T696	1
values[10]	581	1			T537	2		T845	1		T696	1
values[11]	467	1			T537	2		T845	1		T696	1
values[12]	481	1			T537	6		T845	1		T696	1
values[13]	436	1			T537	21		T845	1		T696	1
values[14]	386	1			T537	8		T845	1		T696	1
values[15]	360	1			T537	6		T845	1		T696	1
values[16]	422	1			T537	4		T845	1		T696	1
values[17]	349	1			T537	2		T845	1		T696	1
values[18]	380	1			T537	4		T845	1		T696	1
values[19]	392	1			T537	3		T845	1		T696	1
values[20]	328	1			T537	4		T845	1		T696	1
values[21]	296	1			T537	4		T845	1		T696	1
values[22]	381	1			T537	1		T845	1		T696	1
values[23]	334	1			T537	3		T845	1		T696	1
values[24]	339	1			T537	2		T845	1		T696	1
values[25]	324	1			T537	1		T845	1		T696	1
values[26]	332	1			T537	2		T845	1		T696	1
values[27]	374	1			T537	1		T845	1		T696	1
values[28]	396	1			T537	2		T845	1		T696	1
values[29]	362	1			T537	2		T845	1		T696	1
values[30]	333	1			T537	2		T845	1		T696	1
values[31]	343	1			T537	1		T845	1		T696	1
values[32]	349	1			T537	2		T845	1		T696	1
values[33]	347	1			T537	2		T845	1		T696	1
values[34]	361	1			T537	3		T845	1		T696	1
values[35]	371	1			T537	1		T845	1		T696	1
values[36]	332	1			T537	1		T845	1		T696	1
values[37]	347	1			T537	5		T845	2		T696	1
values[38]	407	1			T537	4		T845	1		T696	1
values[39]	390	1			T537	6		T845	1		T696	1
values[40]	343	1			T537	10		T845	1		T696	1
values[41]	342	1			T537	13		T845	1		T696	1
values[42]	307	1			T537	3		T845	1		T696	1
values[43]	352	1			T537	1		T845	1		T696	1
values[44]	325	1			T537	1		T845	2		T696	1
values[45]	341	1			T537	1		T845	1		T696	1
values[46]	382	1			T537	5		T845	1		T696	1
values[47]	311	1			T537	4		T845	1		T696	1
values[48]	304	1			T537	1		T845	1		T696	1
values[49]	310	1			T537	4		T845	1		T696	1
values[50]	349	1			T537	5		T845	1		T696	1
values[51]	272	1			T537	3		T845	1		T696	1
values[52]	285	1			T537	7		T845	1		T696	1
values[53]	286	1			T537	2		T845	1		T696	1
values[54]	307	1			T537	3		T845	1		T696	1
values[55]	292	1			T537	4		T845	1		T696	1
values[56]	290	1			T537	8		T845	1		T696	1
values[57]	264	1			T537	5		T845	1		T696	1
values[58]	220	1			T537	2		T845	1		T696	1
values[59]	221	1			T537	1		T845	1		T696	1
values[60]	261	1			T537	4		T845	1		T696	1
values[61]	219	1			T537	2		T845	1		T696	1
values[62]	238	1			T537	2		T845	1		T696	1
values[63]	239	1			T537	1		T845	1		T696	1
values[64]	182	1			T537	1		T845	1		T696	1
values[65]	183	1			T537	4		T845	1		T696	1
values[66]	140	1			T537	3		T845	1		T696	1
values[67]	129	1			T537	2		T845	1		T696	1
values[68]	154	1			T537	2		T845	1		T696	1
values[69]	130	1			T537	3		T845	1		T696	1
values[70]	128	1			T537	4		T845	1		T696	1
values[71]	139	1			T537	10		T845	1		T696	1
values[72]	109	1			T537	5		T845	1		T696	1
values[73]	109	1			T537	3		T845	1		T696	1
values[74]	93	1			T537	5		T845	1		T696	1
values[75]	90	1			T537	4		T845	1		T696	1
values[76]	94	1			T537	4		T845	1		T696	1
values[77]	72	1			T537	2		T845	1		T696	1
values[78]	93	1			T537	8		T845	1		T696	1
values[79]	89	1			T537	9		T845	1		T696	1
values[80]	73	1			T537	5		T845	1		T696	1
values[81]	63	1			T537	4		T845	1		T696	1
values[82]	68	1			T537	3		T845	1		T696	1
values[83]	64	1			T537	6		T845	1		T696	1
values[84]	76	1			T537	8		T845	1		T696	1
values[85]	80	1			T537	4		T845	1		T696	1
values[86]	92	1			T537	14		T845	1		T696	1
values[87]	69	1			T537	10		T845	1		T696	2
values[88]	69	1			T537	13		T845	1		T696	1
values[89]	91	1			T537	14		T845	1		T696	1
values[90]	76	1			T537	11		T845	1		T696	1
values[91]	60	1			T537	7		T845	1		T696	1
values[92]	67	1			T537	4		T845	1		T696	1
values[93]	67	1			T537	4		T845	1		T696	1
values[94]	55	1			T537	8		T845	1		T696	1
values[95]	69	1			T537	5		T845	1		T696	1
values[96]	67	1			T537	2		T845	1		T696	1
values[97]	73	1			T537	3		T845	1		T696	1
values[98]	79	1			T537	6		T845	1		T696	1
values[99]	77	1			T537	3		T845	2		T696	1
values[100]	80	1			T845	2		T696	1		T841	1
values[101]	64	1			T845	1		T696	1		T841	1
values[102]	66	1			T845	2		T696	1		T841	1
values[103]	74	1			T845	3		T696	1		T841	1
values[104]	82	1			T845	1		T696	1		T841	1
values[105]	67	1			T845	3		T696	1		T841	1
values[106]	81	1			T845	1		T696	1		T841	1
values[107]	63	1			T845	1		T696	1		T841	1
values[108]	65	1			T845	1		T696	1		T841	1
values[109]	90	1			T845	1		T696	2		T841	1
values[110]	83	1			T845	5		T696	7		T841	1
values[111]	100	1			T845	6		T696	3		T841	1
values[112]	78	1			T845	6		T696	1		T841	2
values[113]	60	1			T845	3		T696	1		T841	1
values[114]	68	1			T845	1		T696	2		T841	1
values[115]	55	1			T845	2		T696	2		T841	1
values[116]	57	1			T845	1		T696	1		T841	1
values[117]	63	1			T845	1		T696	2		T841	1
values[118]	48	1			T845	1		T696	1		T841	1
values[119]	62	1			T845	5		T696	1		T841	1
values[120]	56	1			T845	2		T696	1		T841	1
values[121]	52	1			T845	2		T696	1		T841	1
values[122]	58	1			T845	3		T696	2		T841	2
values[123]	63	1			T845	5		T696	2		T841	2
values[124]	69	1			T845	1		T696	4		T841	3
values[125]	49	1			T845	1		T696	1		T841	2
values[126]	99	1			T845	2		T696	4		T841	3
values[127]	780	1			T845	42		T696	44		T841	37
values[128]	7152	1			T845	359		T696	371		T841	325