Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sysrst_ctrl_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	146338	1			T75	1366		T76	3		T77	8
values[2]	9645	1			T75	83		T81	1		T130	8
values[3]	3580	1			T75	16		T254	5		T503	8
values[4]	2071	1			T75	6		T254	4		T503	3
values[5]	1423	1			T75	3		T503	11		T537	36
values[6]	1038	1			T503	8		T537	22		T473	27
values[7]	805	1			T503	8		T537	18		T473	21
values[8]	653	1			T503	5		T537	8		T473	10
values[9]	646	1			T503	4		T537	5		T473	15
values[10]	537	1			T503	15		T537	1		T473	13
values[11]	458	1			T503	12		T473	12		T696	1
values[12]	402	1			T503	3		T473	22		T696	1
values[13]	468	1			T503	7		T473	13		T696	1
values[14]	386	1			T503	13		T473	12		T696	1
values[15]	426	1			T503	7		T473	12		T696	1
values[16]	383	1			T503	7		T473	12		T696	1
values[17]	440	1			T503	4		T473	15		T696	1
values[18]	454	1			T503	4		T473	10		T696	1
values[19]	428	1			T503	4		T473	12		T696	1
values[20]	371	1			T503	3		T473	11		T696	1
values[21]	443	1			T503	23		T473	24		T696	1
values[22]	420	1			T503	14		T473	19		T696	1
values[23]	411	1			T503	9		T473	15		T696	1
values[24]	432	1			T503	5		T473	26		T696	1
values[25]	428	1			T503	7		T473	17		T696	1
values[26]	388	1			T503	3		T473	10		T696	1
values[27]	412	1			T503	5		T473	27		T696	1
values[28]	403	1			T503	5		T473	9		T696	1
values[29]	434	1			T503	3		T473	17		T696	1
values[30]	391	1			T503	5		T473	15		T696	1
values[31]	365	1			T503	3		T473	12		T696	2
values[32]	388	1			T503	23		T473	25		T696	1
values[33]	457	1			T503	15		T473	19		T696	1
values[34]	371	1			T503	5		T473	8		T696	1
values[35]	412	1			T503	3		T473	11		T696	1
values[36]	408	1			T503	9		T473	10		T696	1
values[37]	435	1			T503	3		T473	12		T696	1
values[38]	380	1			T503	3		T473	16		T696	1
values[39]	366	1			T503	8		T473	17		T696	1
values[40]	413	1			T503	18		T473	11		T696	1
values[41]	369	1			T503	22		T473	9		T696	1
values[42]	369	1			T503	5		T473	8		T696	1
values[43]	366	1			T503	3		T473	26		T696	1
values[44]	329	1			T503	6		T473	13		T696	1
values[45]	352	1			T503	8		T473	15		T696	1
values[46]	334	1			T503	5		T473	14		T696	1
values[47]	373	1			T503	6		T473	11		T696	1
values[48]	332	1			T503	7		T473	10		T696	1
values[49]	361	1			T503	14		T473	16		T696	1
values[50]	345	1			T503	4		T473	19		T696	1
values[51]	386	1			T503	5		T473	14		T696	1
values[52]	355	1			T503	9		T473	9		T696	1
values[53]	390	1			T503	5		T473	17		T696	1
values[54]	340	1			T503	7		T473	21		T696	1
values[55]	293	1			T503	9		T473	12		T696	1
values[56]	344	1			T503	11		T473	12		T696	1
values[57]	332	1			T503	6		T473	9		T696	1
values[58]	353	1			T503	7		T473	23		T696	1
values[59]	360	1			T503	3		T473	10		T696	1
values[60]	332	1			T503	10		T473	28		T696	1
values[61]	284	1			T503	8		T473	33		T696	1
values[62]	276	1			T503	3		T473	23		T696	1
values[63]	268	1			T503	9		T473	10		T696	1
values[64]	265	1			T503	3		T473	15		T696	1
values[65]	284	1			T503	2		T473	21		T696	1
values[66]	266	1			T473	16		T696	1		T854	9
values[67]	251	1			T473	12		T696	1		T854	11
values[68]	230	1			T473	26		T696	1		T854	22
values[69]	168	1			T473	19		T696	1		T854	7
values[70]	176	1			T473	18		T696	1		T854	23
values[71]	137	1			T473	7		T696	1		T854	7
values[72]	131	1			T696	1		T854	5		T850	1
values[73]	119	1			T696	1		T854	11		T850	1
values[74]	96	1			T696	1		T854	8		T850	1
values[75]	90	1			T696	1		T850	1		T867	4
values[76]	97	1			T696	1		T850	1		T867	11
values[77]	94	1			T696	1		T850	1		T867	4
values[78]	99	1			T696	1		T850	1		T867	1
values[79]	90	1			T696	1		T850	1		T498	1
values[80]	75	1			T696	1		T850	1		T498	1
values[81]	86	1			T696	1		T850	1		T498	1
values[82]	85	1			T696	1		T850	1		T498	1
values[83]	94	1			T696	1		T850	1		T498	1
values[84]	73	1			T696	1		T850	1		T498	1
values[85]	82	1			T696	1		T850	1		T498	1
values[86]	77	1			T696	1		T850	1		T498	1
values[87]	71	1			T696	2		T850	1		T498	1
values[88]	88	1			T696	1		T850	1		T498	1
values[89]	80	1			T696	1		T850	1		T498	1
values[90]	83	1			T696	1		T850	1		T498	1
values[91]	88	1			T696	1		T850	1		T498	1
values[92]	77	1			T696	1		T850	1		T498	1
values[93]	84	1			T696	1		T850	1		T498	1
values[94]	78	1			T696	1		T850	1		T498	1
values[95]	100	1			T696	1		T850	1		T498	1
values[96]	96	1			T696	1		T850	1		T498	1
values[97]	110	1			T696	7		T850	1		T498	1
values[98]	105	1			T696	4		T850	1		T498	1
values[99]	99	1			T696	1		T850	1		T498	1
values[100]	89	1			T696	1		T850	1		T498	1
values[101]	87	1			T696	1		T850	1		T498	1
values[102]	85	1			T696	3		T850	1		T498	1
values[103]	88	1			T696	1		T850	1		T498	1
values[104]	82	1			T696	3		T850	1		T498	1
values[105]	77	1			T696	3		T850	1		T498	1
values[106]	97	1			T696	5		T850	1		T498	1
values[107]	93	1			T696	1		T850	1		T498	1
values[108]	87	1			T696	5		T850	1		T498	1
values[109]	82	1			T696	7		T850	1		T498	1
values[110]	79	1			T696	2		T850	1		T498	3
values[111]	73	1			T696	1		T850	1		T498	3
values[112]	61	1			T696	3		T850	1		T498	1
values[113]	67	1			T696	2		T850	1		T498	2
values[114]	83	1			T696	1		T850	1		T498	6
values[115]	89	1			T696	1		T850	2		T498	2
values[116]	95	1			T696	3		T850	1		T498	2
values[117]	86	1			T696	2		T850	1		T498	1
values[118]	80	1			T696	1		T850	3		T498	1
values[119]	77	1			T696	4		T850	1		T498	1
values[120]	73	1			T696	3		T850	1		T498	3
values[121]	89	1			T696	2		T850	1		T498	4
values[122]	92	1			T696	2		T850	4		T498	2
values[123]	71	1			T696	1		T850	3		T498	3
values[124]	77	1			T696	1		T850	2		T498	2
values[125]	106	1			T696	1		T850	1		T498	1
values[126]	162	1			T696	1		T850	3		T498	4
values[127]	1099	1			T696	27		T850	35		T498	37
values[128]	8571	1			T696	304		T850	307		T498	372