dashboard | hierarchy | modlist | groups | tests | asserts

Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 380451 1 T79 24 T446 802 T430 854
rising 380548 1 T79 24 T446 802 T430 854



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1062281 1 T79 48 T446 1928 T430 1754
auto[1] 9311911 1 T79 17408 T80 322 T81 310


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 332879 1 T79 24 T131 1 T258 2
rising 332963 1 T79 24 T131 1 T258 2



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1187208 1 T79 50 T131 2 T258 4
auto[1] 10012881 1 T79 19230 T80 250 T81 398


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 681338 1 T79 27 T131 2 T446 1433
rising 681408 1 T79 27 T131 2 T446 1433



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1078439 1 T79 46 T131 2 T446 2008
auto[1] 9396168 1 T79 17288 T80 328 T81 326


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 7431 1 T79 1 T446 2 T430 31
rising 7477 1 T79 1 T446 2 T430 31



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 171174 1 T79 267 T80 8 T81 9
auto[1] 15527 1 T79 1 T446 2 T430 46


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 5853 1 T79 4 T446 1 T430 2
rising 5883 1 T79 4 T446 1 T526 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 188408 1 T79 731 T80 3 T81 4
auto[1] 9159 1 T79 4 T446 1 T526 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 3154 1 T131 2 T527 1 T528 1
rising 3179 1 T131 2 T527 1 T528 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 182266 1 T79 263 T80 7 T81 8
auto[1] 3403 1 T131 2 T527 1 T528 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 5819 1 T79 5 T131 2 T446 29
rising 5880 1 T79 5 T131 2 T446 29



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 156558 1 T79 517 T80 5 T81 4
auto[1] 17225 1 T79 5 T131 2 T446 33


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 4705 1 T79 6 T81 1 T131 1
rising 4732 1 T79 6 T81 1 T131 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 183427 1 T79 665 T80 4 T81 5
auto[1] 5419 1 T79 7 T81 1 T131 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 7135 1 T131 3 T527 1 T528 2
rising 7185 1 T81 1 T131 3 T527 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 176672 1 T79 274 T80 5 T81 5
auto[1] 14462 1 T81 1 T131 4 T527 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 5302 1 T446 1 T528 1 T474 2
rising 5344 1 T131 1 T446 1 T526 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 178425 1 T79 258 T80 6 T81 6
auto[1] 11843 1 T131 1 T446 1 T526 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 5093 1 T131 2 T446 2 T529 1
rising 5123 1 T131 2 T446 2 T529 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179611 1 T79 247 T80 6 T81 6
auto[1] 9462 1 T131 2 T446 3 T529 2


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 5139 1 T131 3 T446 2 T430 1
rising 5178 1 T131 3 T446 2 T430 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 164453 1 T79 279 T80 8 T81 5
auto[1] 11657 1 T131 3 T446 2 T430 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 4789 1 T446 3 T528 1 T474 2
rising 4812 1 T446 3 T528 1 T474 2



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 177948 1 T79 243 T80 5 T81 3
auto[1] 7356 1 T446 3 T528 1 T474 2


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 4945 1 T79 3 T131 1 T430 19
rising 4972 1 T79 3 T131 1 T430 19



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 187426 1 T79 745 T80 7 T81 13
auto[1] 6343 1 T79 3 T131 1 T430 20


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 14984 1 T79 19 T80 1 T131 15
rising 15016 1 T79 19 T80 1 T131 15



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1429283 1 T79 2687 T80 35 T81 60
auto[1] 15653 1 T79 19 T80 1 T131 16


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 5436 1 T446 3 T430 2 T663 88
rising 5473 1 T446 3 T430 2 T663 89



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 175088 1 T79 249 T80 12 T81 8
auto[1] 11146 1 T446 3 T430 2 T663 290


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 7099 1 T131 4 T446 2 T430 2
rising 7148 1 T131 4 T446 2 T430 2



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 168127 1 T79 249 T80 4 T81 7
auto[1] 19028 1 T131 4 T446 2 T430 2


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 2218 1 T80 2 T131 3 T446 6
rising 2243 1 T80 2 T131 3 T446 6



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180171 1 T79 265 T80 10 T81 3
auto[1] 2353 1 T80 2 T131 3 T446 6


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 6449 1 T131 2 T526 1 T430 2
rising 6482 1 T131 2 T526 1 T430 2



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 170438 1 T79 249 T80 13 T81 5
auto[1] 12133 1 T131 2 T526 1 T430 2


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 7564 1 T80 1 T131 1 T258 1
rising 7610 1 T80 1 T131 1 T258 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 170165 1 T79 266 T80 9 T81 8
auto[1] 16115 1 T80 1 T131 1 T258 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 7159 1 T131 4 T446 1 T430 33
rising 7201 1 T131 4 T446 1 T430 33



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 172116 1 T79 255 T80 4 T81 7
auto[1] 14501 1 T131 4 T446 1 T430 36


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 5675 1 T131 1 T446 3 T526 1
rising 5703 1 T131 1 T446 3 T526 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 183496 1 T79 234 T80 11 T81 8
auto[1] 9109 1 T131 1 T446 3 T526 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 2934 1 T131 3 T526 1 T528 1
rising 2951 1 T131 3 T526 1 T528 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 185439 1 T79 309 T80 4 T81 12
auto[1] 3135 1 T131 3 T526 1 T528 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 7083 1 T131 3 T446 1 T430 2
rising 7132 1 T131 3 T446 1 T430 2



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 177256 1 T79 241 T80 4 T81 7
auto[1] 10923 1 T131 3 T446 1 T430 2


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 45202 1 T530 769 T531 1985 T532 1758
rising 45214 1 T530 770 T531 1986 T532 1758



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 96650 1 T530 1741 T531 4030 T532 3873
auto[1] 87878 1 T530 1469 T531 3945 T532 3380


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 25655 1 T530 476 T531 1030 T532 1077
rising 25655 1 T530 477 T531 1030 T532 1076



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 152974 1 T530 2622 T531 6760 T532 5916
auto[1] 31554 1 T530 588 T531 1215 T532 1337


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 25655 1 T530 476 T531 1030 T532 1077
rising 25655 1 T530 477 T531 1030 T532 1076



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 152974 1 T530 2622 T531 6760 T532 5916
auto[1] 31554 1 T530 588 T531 1215 T532 1337


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 3917 1 T530 88 T531 34 T532 199
rising 3912 1 T530 88 T531 34 T532 199



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179065 1 T530 3046 T531 7939 T532 6959
auto[1] 5463 1 T530 164 T531 36 T532 294


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 122021 1 T151 722 T369 3 T152 276
rising 122043 1 T151 722 T369 3 T152 276



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 41323069 1 T1 63671 T2 351 T3 543030
auto[1] 668348 1 T151 908 T369 3 T152 358


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 45673 1 T530 793 T531 2017 T532 1811
rising 45676 1 T530 793 T531 2017 T532 1812



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 96792 1 T530 1692 T531 4026 T532 3892
auto[1] 87736 1 T530 1518 T531 3949 T532 3361


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 38828 1 T530 689 T531 1651 T532 1559
rising 38834 1 T530 690 T531 1651 T532 1559



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 128802 1 T530 2216 T531 5598 T532 5010
auto[1] 55726 1 T530 994 T531 2377 T532 2243


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 2609 1 T131 2 T526 1 T430 14
rising 2635 1 T131 2 T526 1 T430 14



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 200897 1 T79 260 T80 5 T81 6
auto[1] 2769 1 T131 2 T526 1 T430 14


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 2892 1 T131 1 T446 4 T498 1
rising 2922 1 T131 1 T446 4 T498 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 177706 1 T79 275 T80 11 T81 7
auto[1] 3081 1 T131 1 T446 4 T498 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 6243 1 T79 1 T446 1 T430 51
rising 6299 1 T79 1 T446 1 T430 51



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 159703 1 T79 287 T80 4 T81 3
auto[1] 27516 1 T79 1 T446 1 T430 68


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 7008 1 T79 3 T131 1 T258 1
rising 7053 1 T79 3 T131 1 T258 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 166687 1 T79 684 T80 4 T81 3
auto[1] 20050 1 T79 3 T131 1 T258 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 2725 1 T79 2 T131 1 T446 1
rising 2764 1 T79 2 T131 1 T446 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 173622 1 T79 711 T80 8 T81 7
auto[1] 2928 1 T79 2 T131 1 T446 2


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 6061 1 T131 1 T446 2 T430 16
rising 6099 1 T131 1 T446 2 T430 16



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 166723 1 T79 276 T80 7 T81 3
auto[1] 11742 1 T131 1 T446 2 T430 16


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 6837 1 T131 1 T430 5 T663 101
rising 6867 1 T131 1 T430 5 T663 101



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 169937 1 T79 246 T80 4 T81 7
auto[1] 13181 1 T131 1 T430 5 T663 313


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 4704 1 T131 2 T446 23 T526 2
rising 4739 1 T131 2 T446 23 T526 2



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 176697 1 T79 281 T80 4 T81 12
auto[1] 9453 1 T131 3 T446 25 T526 2


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 21975 1 T79 19 T80 2 T81 1
rising 22004 1 T79 19 T80 2 T81 1



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1424376 1 T79 2566 T80 40 T81 51
auto[1] 23106 1 T79 20 T80 2 T81 1


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 6813 1 T79 1 T131 1 T446 3
rising 6852 1 T79 1 T131 1 T446 3



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 169622 1 T79 261 T80 9 T81 7
auto[1] 13698 1 T79 1 T131 1 T446 3


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 5299 1 T80 1 T81 1 T131 4
rising 5338 1 T80 1 T81 1 T131 4



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 182647 1 T79 278 T80 11 T81 6
auto[1] 8151 1 T80 1 T81 1 T131 4


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 198345 1 T258 166 T446 1031 T447 212
rising 198359 1 T258 166 T446 1030 T447 212



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1783403 1 T258 1493 T446 8890 T447 1853
auto[1] 223058 1 T258 189 T446 1161 T447 237


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 492791 1 T258 409 T446 2450 T447 505
rising 492800 1 T258 408 T446 2450 T447 505



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 890257 1 T258 753 T446 4403 T447 987
auto[1] 1116204 1 T258 929 T446 5648 T447 1103


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 492791 1 T258 409 T446 2450 T447 505
rising 492800 1 T258 408 T446 2450 T447 505



Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 890257 1 T258 753 T446 4403 T447 987
auto[1] 1116204 1 T258 929 T446 5648 T447 1103


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 453853 1 T258 393 T446 2252 T447 470
rising 453801 1 T258 392 T446 2253 T447 471

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%