Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_timer_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	136690	1			T79	242		T80	5		T81	10
values[2]	9288	1			T80	1		T131	3		T446	2
values[3]	3673	1			T527	48		T837	2		T457	1
values[4]	2070	1			T527	39		T457	1		T664	1
values[5]	1447	1			T527	17		T457	1		T664	1
values[6]	968	1			T527	3		T457	1		T664	1
values[7]	718	1			T457	1		T664	1		T484	55
values[8]	574	1			T457	1		T664	1		T484	30
values[9]	481	1			T457	1		T664	1		T484	24
values[10]	405	1			T457	1		T664	1		T484	23
values[11]	396	1			T457	1		T664	1		T484	16
values[12]	316	1			T457	1		T664	1		T484	9
values[13]	342	1			T457	1		T664	1		T484	3
values[14]	361	1			T457	1		T664	1		T452	1
values[15]	352	1			T457	1		T664	1		T452	1
values[16]	320	1			T457	1		T664	1		T452	1
values[17]	355	1			T457	1		T664	1		T452	2
values[18]	336	1			T457	1		T664	1		T452	1
values[19]	325	1			T457	1		T664	1		T452	1
values[20]	304	1			T457	1		T664	1		T452	1
values[21]	342	1			T457	1		T664	1		T452	1
values[22]	314	1			T457	1		T664	1		T452	1
values[23]	329	1			T457	1		T664	1		T452	1
values[24]	333	1			T457	1		T664	1		T452	1
values[25]	327	1			T457	1		T664	1		T452	1
values[26]	246	1			T457	1		T664	1		T452	1
values[27]	317	1			T457	1		T664	1		T452	1
values[28]	287	1			T457	1		T664	1		T452	1
values[29]	330	1			T457	1		T664	1		T452	1
values[30]	305	1			T457	1		T664	1		T452	1
values[31]	291	1			T457	1		T664	1		T452	1
values[32]	294	1			T457	1		T664	1		T452	1
values[33]	355	1			T457	1		T664	1		T452	1
values[34]	352	1			T457	1		T664	1		T452	1
values[35]	300	1			T457	1		T664	1		T452	1
values[36]	265	1			T457	1		T664	1		T452	1
values[37]	293	1			T457	1		T664	1		T452	1
values[38]	338	1			T457	1		T664	1		T452	1
values[39]	320	1			T457	1		T664	1		T452	1
values[40]	314	1			T457	1		T664	1		T452	1
values[41]	331	1			T457	1		T664	1		T452	1
values[42]	314	1			T457	1		T664	1		T452	1
values[43]	302	1			T457	1		T664	1		T452	1
values[44]	283	1			T457	1		T664	1		T452	1
values[45]	333	1			T457	1		T664	1		T452	1
values[46]	286	1			T457	1		T664	1		T452	1
values[47]	279	1			T457	1		T664	1		T452	1
values[48]	283	1			T457	1		T664	1		T452	1
values[49]	257	1			T457	1		T664	1		T452	1
values[50]	289	1			T457	1		T664	1		T452	1
values[51]	243	1			T457	1		T664	1		T452	1
values[52]	265	1			T457	1		T664	1		T452	1
values[53]	221	1			T457	1		T664	1		T452	2
values[54]	214	1			T457	1		T664	1		T452	1
values[55]	295	1			T457	1		T664	1		T452	1
values[56]	248	1			T457	1		T664	1		T452	1
values[57]	266	1			T457	1		T664	1		T452	1
values[58]	278	1			T457	1		T664	1		T452	1
values[59]	216	1			T457	1		T664	1		T452	1
values[60]	232	1			T457	1		T664	1		T452	1
values[61]	234	1			T457	1		T664	1		T452	1
values[62]	198	1			T457	1		T664	1		T452	1
values[63]	189	1			T457	1		T664	1		T452	1
values[64]	197	1			T457	1		T664	1		T452	1
values[65]	166	1			T457	1		T664	1		T452	1
values[66]	191	1			T457	1		T664	1		T452	1
values[67]	192	1			T457	1		T664	1		T452	1
values[68]	182	1			T457	1		T664	1		T452	1
values[69]	179	1			T457	1		T664	1		T452	1
values[70]	134	1			T457	1		T664	1		T452	1
values[71]	148	1			T457	1		T664	2		T452	1
values[72]	162	1			T457	1		T664	1		T452	1
values[73]	124	1			T457	1		T664	1		T452	1
values[74]	96	1			T457	1		T664	1		T452	1
values[75]	96	1			T457	1		T664	1		T452	1
values[76]	103	1			T457	1		T664	1		T452	1
values[77]	123	1			T457	1		T664	1		T452	1
values[78]	88	1			T457	1		T664	1		T452	1
values[79]	95	1			T457	1		T664	1		T452	1
values[80]	119	1			T457	1		T664	1		T452	1
values[81]	144	1			T457	1		T664	1		T452	1
values[82]	107	1			T457	1		T664	1		T452	1
values[83]	107	1			T457	1		T664	1		T452	1
values[84]	97	1			T457	1		T664	1		T452	1
values[85]	72	1			T457	1		T664	1		T452	1
values[86]	99	1			T457	1		T664	1		T452	3
values[87]	97	1			T457	1		T664	1		T452	4
values[88]	111	1			T457	1		T664	1		T452	2
values[89]	99	1			T457	1		T664	1		T452	2
values[90]	106	1			T457	1		T664	1		T452	1
values[91]	104	1			T457	1		T664	1		T452	7
values[92]	87	1			T457	1		T664	1		T452	2
values[93]	78	1			T457	1		T664	1		T452	4
values[94]	82	1			T457	1		T664	1		T452	2
values[95]	83	1			T457	1		T664	1		T452	1
values[96]	108	1			T457	1		T664	1		T452	1
values[97]	98	1			T457	1		T664	1		T452	2
values[98]	106	1			T457	1		T664	1		T452	2
values[99]	74	1			T457	1		T664	1		T452	3
values[100]	93	1			T457	2		T664	1		T452	3
values[101]	87	1			T457	1		T664	1		T452	7
values[102]	87	1			T457	1		T664	1		T452	7
values[103]	84	1			T457	1		T664	1		T452	1
values[104]	85	1			T457	1		T664	1		T452	1
values[105]	105	1			T457	1		T664	2		T452	2
values[106]	92	1			T457	1		T664	4		T452	2
values[107]	76	1			T457	1		T664	7		T452	2
values[108]	66	1			T457	1		T664	3		T452	1
values[109]	77	1			T457	1		T664	3		T452	3
values[110]	70	1			T457	1		T664	4		T452	3
values[111]	67	1			T457	1		T664	1		T452	3
values[112]	66	1			T457	1		T664	2		T452	6
values[113]	74	1			T457	1		T664	2		T452	1
values[114]	78	1			T457	2		T664	1		T452	2
values[115]	81	1			T457	3		T664	1		T452	3
values[116]	80	1			T457	3		T664	1		T452	1
values[117]	71	1			T457	5		T664	3		T452	2
values[118]	71	1			T457	2		T664	1		T452	2
values[119]	67	1			T457	2		T664	5		T452	1
values[120]	68	1			T457	7		T664	1		T452	7
values[121]	51	1			T457	1		T664	1		T452	1
values[122]	49	1			T457	1		T664	3		T452	1
values[123]	59	1			T457	6		T664	1		T452	2
values[124]	49	1			T457	1		T664	1		T452	2
values[125]	78	1			T457	2		T664	4		T452	1
values[126]	77	1			T457	2		T664	3		T452	1
values[127]	612	1			T457	38		T664	20		T452	26
values[128]	5909	1			T457	373		T664	291		T452	282