Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	142341	1			T79	239		T80	1		T81	4
values[2]	9251	1			T79	3		T131	7		T446	5
values[3]	4242	1			T527	29		T660	12		T457	1
values[4]	2413	1			T527	20		T660	12		T457	1
values[5]	1448	1			T527	29		T660	8		T457	1
values[6]	1031	1			T527	23		T660	9		T457	1
values[7]	799	1			T527	30		T660	10		T457	1
values[8]	682	1			T527	22		T660	10		T457	1
values[9]	589	1			T527	20		T660	17		T457	1
values[10]	556	1			T527	28		T660	7		T457	1
values[11]	455	1			T527	8		T660	8		T457	1
values[12]	449	1			T527	2		T660	13		T457	1
values[13]	453	1			T660	17		T457	1		T824	12
values[14]	474	1			T660	7		T457	1		T824	4
values[15]	363	1			T660	21		T457	1		T824	4
values[16]	284	1			T660	5		T457	1		T824	18
values[17]	309	1			T660	4		T457	1		T824	9
values[18]	422	1			T660	7		T457	1		T824	19
values[19]	364	1			T660	9		T457	1		T824	24
values[20]	350	1			T660	14		T457	1		T824	6
values[21]	298	1			T660	10		T457	1		T824	5
values[22]	317	1			T660	3		T457	1		T824	6
values[23]	359	1			T660	6		T457	1		T824	5
values[24]	281	1			T660	12		T457	1		T824	13
values[25]	294	1			T660	17		T457	1		T824	10
values[26]	358	1			T660	30		T457	1		T824	7
values[27]	317	1			T660	3		T457	1		T824	6
values[28]	320	1			T660	6		T457	1		T824	7
values[29]	305	1			T660	6		T457	1		T824	7
values[30]	348	1			T660	5		T457	1		T824	16
values[31]	311	1			T660	6		T457	1		T824	26
values[32]	281	1			T660	19		T457	1		T824	7
values[33]	262	1			T660	11		T457	1		T824	8
values[34]	289	1			T660	10		T457	1		T824	8
values[35]	269	1			T660	4		T457	1		T824	17
values[36]	328	1			T660	16		T457	1		T824	14
values[37]	289	1			T660	16		T457	1		T824	5
values[38]	244	1			T660	15		T457	1		T824	5
values[39]	217	1			T660	4		T457	1		T824	20
values[40]	291	1			T660	11		T457	1		T824	1
values[41]	228	1			T660	5		T457	1		T452	1
values[42]	260	1			T660	4		T457	1		T452	1
values[43]	229	1			T660	25		T457	1		T452	1
values[44]	246	1			T660	27		T457	1		T452	1
values[45]	229	1			T660	5		T457	2		T452	1
values[46]	173	1			T660	6		T457	1		T452	1
values[47]	136	1			T660	4		T457	1		T452	1
values[48]	148	1			T660	6		T457	1		T452	1
values[49]	150	1			T660	10		T457	2		T452	1
values[50]	149	1			T660	4		T457	1		T452	1
values[51]	168	1			T660	10		T457	1		T452	1
values[52]	92	1			T660	1		T457	1		T452	1
values[53]	79	1			T457	1		T452	1		T839	1
values[54]	74	1			T457	1		T452	1		T839	1
values[55]	76	1			T457	1		T452	1		T839	1
values[56]	68	1			T457	1		T452	1		T839	1
values[57]	66	1			T457	1		T452	1		T839	1
values[58]	49	1			T457	1		T452	1		T839	1
values[59]	46	1			T457	1		T452	1		T839	1
values[60]	48	1			T457	1		T452	1		T839	1
values[61]	55	1			T457	1		T452	1		T839	1
values[62]	60	1			T457	1		T452	1		T839	1
values[63]	52	1			T457	1		T452	1		T839	1
values[64]	63	1			T457	1		T452	1		T839	1
values[65]	51	1			T457	1		T452	1		T839	1
values[66]	49	1			T457	1		T452	1		T839	1
values[67]	48	1			T457	1		T452	1		T839	1
values[68]	49	1			T457	1		T452	1		T839	1
values[69]	46	1			T457	1		T452	1		T839	1
values[70]	48	1			T457	1		T452	1		T839	1
values[71]	43	1			T457	1		T452	1		T839	1
values[72]	47	1			T457	1		T452	1		T839	1
values[73]	59	1			T457	1		T452	1		T839	1
values[74]	49	1			T457	1		T452	1		T839	1
values[75]	49	1			T457	1		T452	1		T839	1
values[76]	59	1			T457	1		T452	1		T839	1
values[77]	46	1			T457	1		T452	1		T839	1
values[78]	48	1			T457	1		T452	1		T839	1
values[79]	51	1			T457	1		T452	1		T839	1
values[80]	75	1			T457	1		T452	1		T839	1
values[81]	80	1			T457	5		T452	1		T839	1
values[82]	93	1			T457	3		T452	1		T839	1
values[83]	67	1			T457	3		T452	1		T839	1
values[84]	59	1			T457	2		T452	1		T839	1
values[85]	63	1			T457	6		T452	1		T839	1
values[86]	67	1			T457	3		T452	1		T839	1
values[87]	63	1			T457	4		T452	1		T839	1
values[88]	62	1			T457	3		T452	1		T839	1
values[89]	61	1			T457	1		T452	1		T839	1
values[90]	63	1			T457	2		T452	1		T839	1
values[91]	72	1			T457	1		T452	1		T839	1
values[92]	86	1			T457	2		T452	1		T839	2
values[93]	80	1			T457	1		T452	1		T839	1
values[94]	83	1			T457	2		T452	1		T839	1
values[95]	93	1			T457	1		T452	1		T839	1
values[96]	93	1			T457	1		T452	1		T839	1
values[97]	75	1			T457	7		T452	2		T839	1
values[98]	71	1			T457	7		T452	1		T839	1
values[99]	93	1			T457	2		T452	1		T839	1
values[100]	74	1			T457	1		T452	1		T839	1
values[101]	67	1			T457	1		T452	1		T839	1
values[102]	63	1			T457	1		T452	1		T839	1
values[103]	64	1			T457	2		T452	1		T839	1
values[104]	49	1			T457	1		T452	3		T839	1
values[105]	62	1			T457	3		T452	2		T839	1
values[106]	53	1			T457	2		T452	1		T839	1
values[107]	66	1			T457	1		T452	2		T839	1
values[108]	58	1			T457	2		T452	1		T839	1
values[109]	72	1			T457	4		T452	7		T839	1
values[110]	89	1			T457	1		T452	3		T839	1
values[111]	64	1			T457	1		T452	3		T839	1
values[112]	55	1			T457	1		T452	1		T839	1
values[113]	57	1			T457	1		T452	1		T839	1
values[114]	66	1			T457	4		T452	3		T839	1
values[115]	72	1			T457	2		T452	1		T839	1
values[116]	71	1			T457	2		T452	1		T839	1
values[117]	54	1			T457	4		T452	1		T839	1
values[118]	51	1			T457	1		T452	1		T839	1
values[119]	68	1			T457	3		T452	3		T839	1
values[120]	83	1			T457	1		T452	3		T839	2
values[121]	78	1			T457	2		T452	3		T839	6
values[122]	66	1			T457	3		T452	2		T839	3
values[123]	55	1			T457	4		T452	1		T839	3
values[124]	49	1			T457	2		T452	1		T839	2
values[125]	59	1			T457	2		T452	1		T839	5
values[126]	150	1			T457	5		T452	3		T839	4
values[127]	1839	1			T457	50		T452	62		T839	66
values[128]	8401	1			T457	232		T452	307		T839	330