Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__core_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	155522	1			T79	611		T80	7		T81	13
values[2]	4586	1			T79	73		T131	2		T446	1
values[3]	2248	1			T79	38		T430	33		T404	4
values[4]	1739	1			T79	25		T430	16		T404	1
values[5]	1404	1			T79	1		T430	16		T404	4
values[6]	1241	1			T430	27		T404	5		T527	1
values[7]	1124	1			T430	21		T404	2		T415	1
values[8]	1099	1			T430	21		T404	1		T655	10
values[9]	979	1			T430	29		T404	2		T655	9
values[10]	852	1			T430	41		T404	6		T655	6
values[11]	805	1			T430	31		T404	1		T655	6
values[12]	690	1			T430	7		T404	4		T655	3
values[13]	611	1			T430	5		T404	1		T655	1
values[14]	646	1			T430	4		T404	2		T655	2
values[15]	631	1			T404	1		T560	17		T457	1
values[16]	517	1			T404	3		T560	18		T457	1
values[17]	447	1			T404	2		T560	16		T457	1
values[18]	454	1			T404	8		T560	17		T457	1
values[19]	365	1			T404	3		T560	17		T457	1
values[20]	396	1			T404	4		T560	5		T457	1
values[21]	408	1			T404	1		T560	5		T457	1
values[22]	302	1			T404	6		T560	15		T457	1
values[23]	225	1			T404	1		T560	9		T457	1
values[24]	203	1			T404	2		T560	3		T457	1
values[25]	159	1			T404	3		T560	2		T457	1
values[26]	198	1			T404	4		T560	4		T457	1
values[27]	187	1			T404	1		T560	5		T457	1
values[28]	140	1			T404	1		T560	11		T457	1
values[29]	136	1			T404	1		T560	1		T457	1
values[30]	139	1			T404	3		T457	1		T658	2
values[31]	143	1			T404	4		T457	1		T658	5
values[32]	138	1			T404	5		T457	1		T658	6
values[33]	151	1			T404	1		T457	1		T658	13
values[34]	138	1			T404	3		T457	1		T658	8
values[35]	104	1			T404	1		T457	1		T658	4
values[36]	115	1			T404	1		T457	1		T658	5
values[37]	105	1			T404	1		T457	1		T658	1
values[38]	136	1			T404	4		T457	1		T658	3
values[39]	117	1			T404	3		T457	1		T658	2
values[40]	112	1			T404	1		T457	1		T484	2
values[41]	99	1			T404	2		T457	1		T484	1
values[42]	110	1			T404	1		T457	1		T484	1
values[43]	107	1			T404	2		T457	1		T484	1
values[44]	95	1			T404	1		T457	1		T484	4
values[45]	95	1			T404	10		T457	1		T484	2
values[46]	70	1			T404	4		T457	1		T484	2
values[47]	56	1			T404	2		T457	1		T484	1
values[48]	50	1			T404	1		T457	1		T484	1
values[49]	53	1			T404	3		T457	1		T484	3
values[50]	44	1			T404	1		T457	1		T484	1
values[51]	43	1			T404	1		T457	1		T484	1
values[52]	50	1			T404	2		T457	1		T484	2
values[53]	48	1			T404	1		T457	1		T484	1
values[54]	45	1			T404	4		T457	1		T484	1
values[55]	51	1			T404	1		T457	1		T484	1
values[56]	61	1			T404	1		T457	1		T484	2
values[57]	49	1			T404	1		T457	1		T484	2
values[58]	43	1			T404	2		T457	1		T484	1
values[59]	45	1			T404	1		T457	1		T484	1
values[60]	45	1			T404	1		T457	1		T484	3
values[61]	46	1			T404	1		T457	1		T484	4
values[62]	38	1			T404	1		T457	1		T484	2
values[63]	45	1			T404	3		T457	1		T484	2
values[64]	44	1			T404	1		T457	1		T484	1
values[65]	47	1			T404	2		T457	1		T484	1
values[66]	49	1			T404	1		T457	1		T484	1
values[67]	51	1			T404	1		T457	1		T484	2
values[68]	49	1			T404	2		T457	1		T484	6
values[69]	45	1			T404	1		T457	1		T484	3
values[70]	43	1			T404	4		T457	1		T484	1
values[71]	53	1			T404	4		T457	1		T484	1
values[72]	57	1			T404	3		T457	1		T484	5
values[73]	45	1			T404	2		T457	1		T484	3
values[74]	49	1			T404	1		T457	1		T484	4
values[75]	45	1			T404	3		T457	1		T484	1
values[76]	52	1			T404	1		T457	1		T484	1
values[77]	55	1			T404	3		T457	1		T484	1
values[78]	50	1			T404	1		T457	1		T484	3
values[79]	58	1			T404	2		T457	1		T484	2
values[80]	56	1			T404	1		T457	1		T484	1
values[81]	59	1			T404	2		T457	1		T484	2
values[82]	51	1			T404	1		T457	1		T484	3
values[83]	45	1			T404	5		T457	1		T484	2
values[84]	56	1			T404	2		T457	1		T484	2
values[85]	46	1			T404	2		T457	1		T484	1
values[86]	47	1			T404	7		T457	1		T484	1
values[87]	57	1			T404	9		T457	1		T484	3
values[88]	48	1			T404	4		T457	1		T484	2
values[89]	53	1			T404	1		T457	1		T484	4
values[90]	49	1			T404	2		T457	1		T484	3
values[91]	44	1			T404	1		T457	1		T484	1
values[92]	51	1			T404	3		T457	1		T484	3
values[93]	58	1			T404	2		T457	1		T484	1
values[94]	59	1			T404	2		T457	1		T484	3
values[95]	82	1			T404	2		T457	1		T484	5
values[96]	61	1			T404	3		T457	1		T484	1
values[97]	66	1			T404	4		T457	1		T484	3
values[98]	75	1			T404	10		T457	4		T484	5
values[99]	74	1			T404	3		T457	4		T484	4
values[100]	75	1			T404	4		T457	2		T484	1
values[101]	76	1			T404	3		T457	2		T484	2
values[102]	88	1			T404	3		T457	2		T484	5
values[103]	79	1			T404	4		T457	1		T484	4
values[104]	76	1			T404	5		T457	1		T484	4
values[105]	64	1			T404	1		T457	2		T484	5
values[106]	81	1			T404	4		T457	2		T484	6
values[107]	67	1			T404	5		T457	1		T484	3
values[108]	75	1			T404	1		T457	1		T484	3
values[109]	80	1			T404	4		T457	1		T484	4
values[110]	93	1			T404	11		T457	1		T484	2
values[111]	78	1			T404	5		T457	1		T484	3
values[112]	88	1			T404	5		T457	1		T484	3
values[113]	76	1			T404	1		T457	1		T484	5
values[114]	83	1			T404	3		T457	2		T484	6
values[115]	80	1			T404	3		T457	3		T484	3
values[116]	85	1			T404	6		T457	1		T484	4
values[117]	85	1			T404	1		T457	3		T484	4
values[118]	97	1			T404	5		T457	6		T484	4
values[119]	74	1			T404	2		T457	2		T484	4
values[120]	94	1			T404	2		T457	3		T484	3
values[121]	97	1			T404	2		T457	4		T484	2
values[122]	82	1			T404	2		T457	1		T484	1
values[123]	123	1			T404	8		T457	4		T484	4
values[124]	189	1			T404	12		T457	2		T484	8
values[125]	355	1			T404	40		T457	2		T484	50
values[126]	804	1			T404	58		T457	14		T484	83
values[127]	2785	1			T404	36		T457	100		T484	50
values[128]	4611	1			T404	3		T457	226		T484	3