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Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 200 1 T80 1 T81 1 T509 1
small_delay 965 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1


Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
big_delay 500 1 T80 1 T81 1 T526 1
small_delay 665 1 T79 1 T131 1 T446 1
zero 635 1 T258 1 T856 1 T448 1

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