LINE 18008 EXPRESSION (addr_hit[201] & reg_we & ((!reg_error))) ------1------ ---2-- -------3------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T1,T3,T4 |
1 | 0 | 1 | Covered | T225,T150,T151 |
1 | 1 | 0 | Covered | T561,T646,T696 |
1 | 1 | 1 | Covered | T47,T48,T225 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |