Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.kmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	167475	1			T85	391		T87	100		T124	663
values[2]	4506	1			T87	3		T464	1		T554	1
values[3]	2476	1			T554	1		T552	13		T480	89
values[4]	2008	1			T554	1		T552	11		T480	51
values[5]	1538	1			T554	1		T552	10		T480	33
values[6]	1349	1			T554	1		T552	11		T480	24
values[7]	1079	1			T554	1		T552	10		T480	9
values[8]	853	1			T554	1		T552	14		T480	7
values[9]	797	1			T554	1		T552	13		T480	3
values[10]	804	1			T554	1		T552	23		T480	2
values[11]	724	1			T554	1		T552	19		T495	6
values[12]	574	1			T554	1		T552	15		T495	4
values[13]	542	1			T554	1		T552	14		T495	3
values[14]	558	1			T554	1		T552	8		T495	11
values[15]	525	1			T554	1		T552	8		T495	6
values[16]	506	1			T554	1		T552	14		T495	5
values[17]	466	1			T554	1		T552	9		T495	3
values[18]	454	1			T554	1		T552	6		T495	4
values[19]	400	1			T554	1		T552	3		T495	4
values[20]	389	1			T554	1		T552	2		T495	7
values[21]	310	1			T554	1		T552	3		T495	3
values[22]	323	1			T554	1		T552	2		T495	6
values[23]	318	1			T554	1		T552	2		T495	8
values[24]	292	1			T554	1		T552	5		T495	5
values[25]	276	1			T554	1		T552	6		T495	6
values[26]	235	1			T554	1		T552	2		T495	4
values[27]	240	1			T554	1		T552	2		T495	7
values[28]	266	1			T554	1		T552	9		T495	5
values[29]	254	1			T554	1		T552	17		T495	5
values[30]	219	1			T554	1		T552	12		T495	5
values[31]	206	1			T554	1		T552	7		T495	5
values[32]	214	1			T554	1		T552	14		T495	7
values[33]	255	1			T554	2		T552	23		T495	8
values[34]	265	1			T554	1		T552	35		T495	7
values[35]	242	1			T554	1		T552	24		T495	2
values[36]	251	1			T554	1		T552	31		T495	6
values[37]	250	1			T554	1		T552	28		T495	2
values[38]	251	1			T554	1		T552	43		T495	4
values[39]	215	1			T554	1		T552	33		T495	5
values[40]	233	1			T554	1		T552	30		T495	4
values[41]	201	1			T554	1		T552	10		T495	5
values[42]	222	1			T554	1		T495	7		T514	1
values[43]	207	1			T554	1		T495	4		T514	1
values[44]	193	1			T554	1		T495	2		T514	1
values[45]	219	1			T554	1		T495	4		T514	1
values[46]	225	1			T554	1		T495	4		T514	1
values[47]	172	1			T554	1		T495	5		T514	1
values[48]	152	1			T554	1		T495	6		T514	1
values[49]	173	1			T554	1		T495	2		T514	1
values[50]	146	1			T554	1		T495	4		T514	1
values[51]	141	1			T554	1		T495	5		T514	1
values[52]	129	1			T554	1		T495	5		T514	1
values[53]	96	1			T554	1		T495	2		T514	1
values[54]	82	1			T554	1		T495	7		T514	1
values[55]	69	1			T554	1		T495	6		T514	1
values[56]	69	1			T554	1		T495	3		T514	1
values[57]	71	1			T554	1		T495	4		T514	1
values[58]	67	1			T554	1		T495	5		T514	1
values[59]	65	1			T554	1		T495	4		T514	1
values[60]	81	1			T554	1		T495	7		T514	1
values[61]	84	1			T554	1		T495	11		T514	1
values[62]	70	1			T554	1		T495	6		T514	1
values[63]	68	1			T554	1		T495	7		T514	1
values[64]	79	1			T554	1		T495	5		T514	1
values[65]	66	1			T554	1		T495	3		T514	1
values[66]	62	1			T554	1		T495	2		T514	1
values[67]	82	1			T554	1		T495	2		T514	1
values[68]	77	1			T554	1		T495	5		T514	1
values[69]	77	1			T554	1		T495	10		T514	1
values[70]	66	1			T554	1		T495	5		T514	1
values[71]	81	1			T554	1		T495	6		T514	1
values[72]	85	1			T554	1		T495	6		T514	1
values[73]	70	1			T554	1		T495	4		T514	1
values[74]	83	1			T554	1		T495	6		T514	1
values[75]	76	1			T554	1		T495	4		T514	1
values[76]	77	1			T554	1		T495	3		T514	1
values[77]	94	1			T554	1		T495	8		T514	1
values[78]	88	1			T554	1		T495	9		T514	1
values[79]	75	1			T554	1		T495	4		T514	1
values[80]	80	1			T554	1		T495	6		T514	1
values[81]	76	1			T554	1		T495	2		T514	1
values[82]	102	1			T554	1		T495	4		T514	1
values[83]	84	1			T554	1		T495	7		T514	1
values[84]	92	1			T554	1		T495	4		T514	1
values[85]	96	1			T554	1		T495	6		T514	1
values[86]	100	1			T554	1		T495	4		T514	1
values[87]	115	1			T554	1		T495	4		T514	1
values[88]	128	1			T554	1		T495	3		T514	1
values[89]	96	1			T554	1		T495	5		T514	1
values[90]	93	1			T554	1		T495	4		T514	1
values[91]	114	1			T554	1		T495	5		T514	1
values[92]	113	1			T554	1		T495	4		T514	1
values[93]	88	1			T554	1		T495	3		T514	1
values[94]	103	1			T554	1		T495	5		T514	1
values[95]	107	1			T554	1		T495	10		T514	1
values[96]	116	1			T554	1		T495	8		T514	1
values[97]	108	1			T554	1		T495	8		T514	1
values[98]	112	1			T554	1		T495	5		T514	1
values[99]	112	1			T554	1		T495	9		T514	1
values[100]	125	1			T554	1		T495	3		T514	1
values[101]	115	1			T554	1		T495	4		T514	1
values[102]	124	1			T554	1		T495	5		T514	1
values[103]	119	1			T554	1		T495	7		T514	1
values[104]	109	1			T554	1		T495	8		T514	1
values[105]	130	1			T554	2		T495	3		T514	1
values[106]	144	1			T554	4		T495	8		T514	1
values[107]	139	1			T554	1		T495	8		T514	1
values[108]	109	1			T554	1		T495	7		T514	1
values[109]	121	1			T554	2		T495	8		T514	1
values[110]	124	1			T554	1		T495	12		T514	1
values[111]	123	1			T554	1		T495	6		T514	1
values[112]	104	1			T554	2		T495	6		T514	1
values[113]	111	1			T554	5		T495	11		T514	1
values[114]	143	1			T554	3		T495	8		T514	1
values[115]	123	1			T554	2		T495	12		T514	1
values[116]	136	1			T554	2		T495	8		T514	1
values[117]	131	1			T554	1		T495	11		T514	1
values[118]	139	1			T554	2		T495	16		T514	1
values[119]	146	1			T554	2		T495	15		T514	1
values[120]	146	1			T554	2		T495	16		T514	3
values[121]	146	1			T554	2		T495	18		T514	3
values[122]	144	1			T554	1		T495	14		T514	1
values[123]	158	1			T554	1		T495	16		T514	3
values[124]	207	1			T554	2		T495	26		T514	2
values[125]	382	1			T554	4		T495	53		T514	2
values[126]	797	1			T554	14		T495	75		T514	10
values[127]	2855	1			T554	115		T495	45		T514	105
values[128]	5081	1			T554	174		T495	3		T514	198