Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	151552	1			T85	821		T86	1		T87	92
values[2]	12156	1			T85	33		T86	1		T87	1
values[3]	4932	1			T85	10		T86	1		T124	33
values[4]	2804	1			T85	4		T86	1		T124	15
values[5]	1781	1			T85	9		T86	1		T124	15
values[6]	1217	1			T85	3		T86	1		T124	14
values[7]	871	1			T85	11		T86	1		T124	20
values[8]	605	1			T85	7		T86	1		T124	5
values[9]	456	1			T85	4		T86	1		T124	14
values[10]	437	1			T85	4		T86	1		T124	13
values[11]	399	1			T85	5		T86	1		T124	9
values[12]	318	1			T85	13		T86	1		T124	4
values[13]	312	1			T85	7		T86	1		T124	4
values[14]	375	1			T85	10		T86	1		T124	15
values[15]	323	1			T85	11		T86	1		T124	11
values[16]	301	1			T85	9		T86	1		T124	7
values[17]	252	1			T85	8		T86	1		T124	3
values[18]	280	1			T85	6		T86	1		T124	4
values[19]	341	1			T85	9		T86	1		T124	9
values[20]	333	1			T85	11		T86	1		T124	9
values[21]	309	1			T85	3		T86	1		T124	9
values[22]	348	1			T85	3		T86	1		T124	13
values[23]	325	1			T85	4		T86	1		T124	13
values[24]	324	1			T85	3		T86	1		T124	6
values[25]	251	1			T85	12		T86	1		T124	4
values[26]	246	1			T85	6		T86	1		T124	3
values[27]	279	1			T85	13		T86	1		T124	7
values[28]	316	1			T85	11		T86	1		T124	17
values[29]	287	1			T85	9		T86	1		T124	7
values[30]	292	1			T85	12		T86	1		T124	8
values[31]	268	1			T85	6		T86	1		T124	4
values[32]	244	1			T85	6		T86	1		T124	5
values[33]	243	1			T85	9		T86	1		T124	5
values[34]	290	1			T85	8		T86	1		T124	6
values[35]	276	1			T85	3		T86	1		T124	2
values[36]	254	1			T85	3		T86	1		T124	5
values[37]	249	1			T85	5		T86	1		T124	5
values[38]	245	1			T85	9		T86	1		T124	3
values[39]	259	1			T85	4		T86	1		T124	9
values[40]	264	1			T85	7		T86	1		T124	6
values[41]	249	1			T85	10		T86	1		T124	4
values[42]	235	1			T85	5		T86	1		T124	5
values[43]	248	1			T85	14		T86	1		T124	10
values[44]	252	1			T85	9		T86	1		T124	11
values[45]	303	1			T85	5		T86	1		T124	3
values[46]	286	1			T85	16		T86	1		T124	4
values[47]	256	1			T85	8		T86	1		T124	22
values[48]	220	1			T85	5		T86	1		T124	8
values[49]	236	1			T85	6		T86	1		T124	4
values[50]	231	1			T85	4		T86	1		T124	11
values[51]	237	1			T85	21		T86	1		T124	11
values[52]	255	1			T85	5		T86	1		T124	4
values[53]	256	1			T85	6		T86	1		T124	7
values[54]	239	1			T85	8		T86	1		T124	4
values[55]	223	1			T85	6		T86	1		T124	8
values[56]	215	1			T85	12		T86	1		T124	12
values[57]	222	1			T85	3		T86	1		T489	8
values[58]	200	1			T85	5		T86	1		T489	5
values[59]	202	1			T85	5		T86	1		T489	3
values[60]	182	1			T85	6		T86	1		T489	5
values[61]	184	1			T85	7		T86	1		T489	10
values[62]	168	1			T85	8		T86	1		T489	3
values[63]	176	1			T85	12		T86	1		T489	6
values[64]	193	1			T85	10		T86	1		T489	3
values[65]	252	1			T85	5		T86	1		T489	10
values[66]	242	1			T85	5		T86	1		T489	5
values[67]	229	1			T85	19		T86	1		T489	4
values[68]	205	1			T85	12		T86	1		T495	9
values[69]	166	1			T85	5		T86	1		T495	6
values[70]	162	1			T85	5		T86	1		T495	4
values[71]	161	1			T85	17		T86	1		T495	9
values[72]	168	1			T85	11		T86	1		T495	10
values[73]	152	1			T85	3		T86	1		T495	5
values[74]	147	1			T86	1		T495	5		T514	1
values[75]	131	1			T86	1		T495	6		T514	1
values[76]	98	1			T86	1		T495	9		T514	1
values[77]	110	1			T86	1		T495	7		T514	1
values[78]	87	1			T86	1		T495	5		T514	1
values[79]	89	1			T86	1		T495	8		T514	1
values[80]	99	1			T86	1		T495	13		T514	1
values[81]	116	1			T86	1		T495	8		T514	1
values[82]	131	1			T86	1		T495	9		T514	1
values[83]	141	1			T86	1		T495	12		T514	1
values[84]	91	1			T86	1		T495	3		T514	1
values[85]	108	1			T86	1		T495	6		T514	1
values[86]	122	1			T86	1		T495	10		T514	1
values[87]	107	1			T86	3		T495	13		T514	1
values[88]	114	1			T86	2		T495	8		T514	1
values[89]	95	1			T86	7		T495	7		T514	1
values[90]	94	1			T86	3		T495	5		T514	1
values[91]	112	1			T86	3		T495	4		T514	1
values[92]	105	1			T86	2		T495	3		T514	1
values[93]	87	1			T86	10		T495	2		T514	1
values[94]	83	1			T86	2		T495	2		T514	1
values[95]	87	1			T86	2		T495	8		T514	1
values[96]	101	1			T86	1		T495	11		T514	1
values[97]	100	1			T86	7		T495	8		T514	1
values[98]	90	1			T86	2		T495	4		T514	1
values[99]	101	1			T86	4		T495	12		T514	1
values[100]	106	1			T86	2		T495	6		T514	1
values[101]	88	1			T86	7		T495	4		T514	1
values[102]	81	1			T86	9		T495	1		T514	1
values[103]	73	1			T86	4		T495	2		T514	1
values[104]	66	1			T86	1		T495	3		T514	1
values[105]	68	1			T86	2		T495	2		T514	1
values[106]	72	1			T86	2		T495	5		T514	1
values[107]	93	1			T86	1		T495	5		T514	1
values[108]	79	1			T86	4		T495	4		T514	1
values[109]	77	1			T86	1		T495	6		T514	1
values[110]	69	1			T86	3		T495	7		T514	1
values[111]	61	1			T86	2		T495	8		T514	1
values[112]	45	1			T86	1		T514	1		T881	1
values[113]	50	1			T86	3		T514	1		T881	1
values[114]	75	1			T86	3		T514	4		T881	1
values[115]	72	1			T86	3		T514	7		T881	1
values[116]	68	1			T86	2		T514	1		T881	1
values[117]	63	1			T86	3		T514	1		T881	1
values[118]	54	1			T86	1		T514	1		T881	1
values[119]	57	1			T86	1		T514	1		T881	1
values[120]	57	1			T86	3		T514	3		T881	1
values[121]	53	1			T86	1		T514	1		T881	1
values[122]	61	1			T86	2		T514	1		T881	1
values[123]	51	1			T86	6		T514	1		T881	1
values[124]	52	1			T86	1		T514	2		T881	1
values[125]	51	1			T86	1		T514	1		T881	1
values[126]	106	1			T86	2		T514	4		T881	4
values[127]	702	1			T86	25		T514	33		T881	15
values[128]	6836	1			T86	245		T514	404		T881	273