Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	131875	1			T71	15		T72	3		T77	49
values[2]	9283	1			T246	3		T545	3		T546	56
values[3]	3686	1			T546	25		T589	28		T892	1
values[4]	2208	1			T546	16		T589	22		T470	16
values[5]	1381	1			T546	12		T589	18		T470	5
values[6]	915	1			T546	11		T589	23		T470	1
values[7]	617	1			T546	14		T589	3		T588	4
values[8]	495	1			T546	9		T589	13		T588	3
values[9]	403	1			T546	8		T589	5		T588	4
values[10]	405	1			T546	7		T589	3		T588	5
values[11]	321	1			T546	10		T589	7		T588	1
values[12]	321	1			T546	6		T589	6		T588	1
values[13]	339	1			T546	5		T589	18		T588	5
values[14]	347	1			T546	5		T589	5		T588	2
values[15]	305	1			T546	5		T589	7		T588	1
values[16]	273	1			T546	7		T589	5		T893	18
values[17]	283	1			T546	9		T589	6		T893	18
values[18]	290	1			T546	5		T589	14		T893	25
values[19]	312	1			T546	8		T589	16		T893	11
values[20]	268	1			T546	5		T589	7		T893	4
values[21]	302	1			T546	2		T589	10		T893	7
values[22]	284	1			T546	2		T589	10		T507	11
values[23]	216	1			T546	2		T589	4		T507	7
values[24]	252	1			T546	1		T589	9		T507	11
values[25]	256	1			T589	3		T507	6		T882	10
values[26]	253	1			T589	5		T507	6		T882	16
values[27]	273	1			T589	14		T507	6		T882	8
values[28]	232	1			T589	18		T507	6		T882	5
values[29]	261	1			T589	7		T507	6		T882	9
values[30]	219	1			T589	8		T507	7		T882	3
values[31]	266	1			T589	7		T507	7		T882	10
values[32]	265	1			T507	8		T882	7		T872	1
values[33]	281	1			T507	13		T882	6		T872	1
values[34]	255	1			T507	4		T882	8		T872	1
values[35]	269	1			T507	13		T882	11		T872	1
values[36]	250	1			T507	7		T882	4		T872	1
values[37]	248	1			T507	3		T882	5		T872	1
values[38]	242	1			T507	4		T882	4		T872	1
values[39]	253	1			T507	9		T882	6		T872	1
values[40]	282	1			T507	8		T882	7		T872	1
values[41]	258	1			T507	8		T882	6		T872	1
values[42]	250	1			T507	3		T882	2		T872	1
values[43]	199	1			T507	6		T882	15		T872	1
values[44]	228	1			T507	8		T882	31		T872	1
values[45]	224	1			T507	9		T882	7		T872	1
values[46]	283	1			T507	26		T882	9		T872	1
values[47]	229	1			T507	5		T882	7		T872	1
values[48]	245	1			T507	18		T882	10		T872	1
values[49]	200	1			T507	7		T882	4		T872	1
values[50]	251	1			T507	3		T882	4		T872	1
values[51]	178	1			T507	4		T882	4		T872	1
values[52]	180	1			T507	4		T882	6		T872	1
values[53]	198	1			T507	5		T882	4		T872	1
values[54]	186	1			T507	3		T882	4		T872	1
values[55]	174	1			T507	8		T882	5		T872	1
values[56]	210	1			T507	5		T882	22		T872	1
values[57]	215	1			T507	9		T882	6		T872	1
values[58]	195	1			T507	3		T882	9		T872	1
values[59]	217	1			T507	10		T882	15		T872	1
values[60]	154	1			T507	4		T882	11		T872	1
values[61]	178	1			T507	15		T872	1		T859	1
values[62]	195	1			T507	9		T872	1		T859	1
values[63]	155	1			T872	1		T859	1		T855	1
values[64]	131	1			T872	1		T859	1		T855	1
values[65]	103	1			T872	1		T859	1		T855	1
values[66]	87	1			T872	1		T859	1		T855	1
values[67]	93	1			T872	1		T859	1		T855	1
values[68]	107	1			T872	1		T859	1		T855	1
values[69]	109	1			T872	1		T859	1		T855	1
values[70]	103	1			T872	1		T859	1		T855	1
values[71]	122	1			T872	1		T859	1		T855	1
values[72]	104	1			T872	1		T859	1		T855	1
values[73]	97	1			T872	1		T859	1		T855	1
values[74]	77	1			T872	1		T859	1		T855	1
values[75]	75	1			T872	1		T859	1		T855	1
values[76]	95	1			T872	1		T859	1		T855	1
values[77]	66	1			T872	1		T859	1		T855	1
values[78]	67	1			T872	1		T859	1		T855	6
values[79]	67	1			T872	1		T859	1		T855	1
values[80]	69	1			T872	1		T859	1		T855	5
values[81]	77	1			T872	1		T859	1		T855	1
values[82]	78	1			T872	1		T859	1		T855	5
values[83]	60	1			T872	1		T859	1		T855	1
values[84]	63	1			T872	1		T859	1		T855	2
values[85]	71	1			T872	1		T859	1		T855	2
values[86]	84	1			T872	1		T859	1		T855	7
values[87]	65	1			T872	1		T859	1		T855	1
values[88]	69	1			T872	1		T859	1		T855	1
values[89]	65	1			T872	1		T859	1		T855	1
values[90]	55	1			T872	1		T859	1		T855	2
values[91]	70	1			T872	1		T859	1		T855	1
values[92]	87	1			T872	1		T859	1		T855	1
values[93]	56	1			T872	1		T859	1		T855	3
values[94]	82	1			T872	1		T859	1		T855	1
values[95]	99	1			T872	1		T859	1		T855	2
values[96]	77	1			T872	1		T859	1		T855	1
values[97]	76	1			T872	1		T859	1		T855	1
values[98]	65	1			T872	1		T859	1		T855	2
values[99]	70	1			T872	1		T859	1		T855	9
values[100]	62	1			T872	1		T859	1		T855	3
values[101]	66	1			T872	1		T859	1		T855	6
values[102]	64	1			T872	2		T859	1		T855	3
values[103]	61	1			T872	1		T859	1		T855	5
values[104]	76	1			T872	3		T859	1		T855	1
values[105]	78	1			T872	7		T859	1		T855	1
values[106]	74	1			T872	2		T859	1		T855	1
values[107]	56	1			T872	2		T859	4		T855	1
values[108]	78	1			T872	6		T859	2		T855	4
values[109]	53	1			T872	2		T859	3		T855	1
values[110]	60	1			T872	2		T859	5		T855	1
values[111]	54	1			T872	1		T859	5		T855	3
values[112]	52	1			T872	2		T859	1		T855	1
values[113]	57	1			T872	1		T859	2		T855	4
values[114]	54	1			T872	4		T859	2		T855	1
values[115]	63	1			T872	1		T859	1		T855	4
values[116]	62	1			T872	1		T859	3		T855	3
values[117]	56	1			T872	2		T859	3		T855	2
values[118]	57	1			T872	4		T859	2		T855	2
values[119]	63	1			T872	4		T859	1		T855	3
values[120]	62	1			T872	2		T859	3		T855	3
values[121]	55	1			T872	2		T859	3		T855	1
values[122]	57	1			T872	2		T859	3		T855	1
values[123]	55	1			T872	1		T859	2		T855	1
values[124]	65	1			T872	2		T859	2		T855	1
values[125]	70	1			T872	3		T859	3		T855	1
values[126]	109	1			T872	1		T859	3		T855	1
values[127]	841	1			T872	25		T859	38		T855	30
values[128]	7092	1			T872	307		T859	261		T855	297