Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
6766 |
1 |
|
|
T407 |
676 |
|
T310 |
87 |
|
T214 |
84 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
6769 |
1 |
|
|
T407 |
676 |
|
T310 |
87 |
|
T214 |
84 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
6766 |
1 |
|
|
T407 |
676 |
|
T310 |
87 |
|
T214 |
84 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
1979 |
1 |
|
|
T50 |
1 |
|
T51 |
1 |
|
T82 |
41 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
1980 |
1 |
|
|
T50 |
1 |
|
T51 |
1 |
|
T82 |
41 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
1979 |
1 |
|
|
T50 |
1 |
|
T51 |
1 |
|
T82 |
41 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
103 |
1 |
|
|
T50 |
1 |
|
T51 |
1 |
|
T52 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
105 |
1 |
|
|
T166 |
1 |
|
T50 |
1 |
|
T51 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
103 |
1 |
|
|
T50 |
1 |
|
T51 |
1 |
|
T52 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
4400 |
1 |
|
|
T755 |
819 |
|
T756 |
817 |
|
T757 |
811 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
4404 |
1 |
|
|
T755 |
820 |
|
T756 |
818 |
|
T757 |
811 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
4400 |
1 |
|
|
T755 |
819 |
|
T756 |
817 |
|
T757 |
811 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
3664 |
1 |
|
|
T92 |
1153 |
|
T704 |
1137 |
|
T50 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
3664 |
1 |
|
|
T92 |
1153 |
|
T704 |
1137 |
|
T50 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
3664 |
1 |
|
|
T92 |
1153 |
|
T704 |
1137 |
|
T50 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
4126 |
1 |
|
|
T156 |
2 |
|
T760 |
817 |
|
T761 |
514 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
4128 |
1 |
|
|
T156 |
2 |
|
T760 |
817 |
|
T761 |
514 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
4126 |
1 |
|
|
T156 |
2 |
|
T760 |
817 |
|
T761 |
514 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
8067 |
1 |
|
|
T265 |
523 |
|
T156 |
1 |
|
T759 |
514 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
8071 |
1 |
|
|
T265 |
523 |
|
T156 |
1 |
|
T759 |
514 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
8067 |
1 |
|
|
T265 |
523 |
|
T156 |
1 |
|
T759 |
514 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
111 |
1 |
|
|
T156 |
1 |
|
T50 |
1 |
|
T328 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
111 |
1 |
|
|
T156 |
1 |
|
T50 |
1 |
|
T328 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
111 |
1 |
|
|
T156 |
1 |
|
T50 |
1 |
|
T328 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
1960 |
1 |
|
|
T156 |
1 |
|
T540 |
813 |
|
T778 |
516 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
1961 |
1 |
|
|
T156 |
1 |
|
T540 |
814 |
|
T778 |
516 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
1960 |
1 |
|
|
T156 |
1 |
|
T540 |
813 |
|
T778 |
516 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
4402 |
1 |
|
|
T310 |
104 |
|
T214 |
81 |
|
T271 |
102 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
4404 |
1 |
|
|
T310 |
104 |
|
T214 |
81 |
|
T271 |
102 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
4402 |
1 |
|
|
T310 |
104 |
|
T214 |
81 |
|
T271 |
102 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
262 |
1 |
|
|
T702 |
1 |
|
T50 |
1 |
|
T703 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
262 |
1 |
|
|
T702 |
1 |
|
T50 |
1 |
|
T703 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
262 |
1 |
|
|
T702 |
1 |
|
T50 |
1 |
|
T703 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
5894 |
1 |
|
|
T709 |
1724 |
|
T710 |
1719 |
|
T50 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
5895 |
1 |
|
|
T709 |
1724 |
|
T710 |
1720 |
|
T50 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
5894 |
1 |
|
|
T709 |
1724 |
|
T710 |
1719 |
|
T50 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
269 |
1 |
|
|
T707 |
2 |
|
T702 |
1 |
|
T708 |
2 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
269 |
1 |
|
|
T707 |
2 |
|
T702 |
1 |
|
T708 |
2 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
269 |
1 |
|
|
T707 |
2 |
|
T702 |
1 |
|
T708 |
2 |