Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	145496	1			T73	13		T74	25		T75	186
values[2]	10516	1			T74	2		T255	11		T553	1
values[3]	4380	1			T255	13		T555	1		T538	49
values[4]	2598	1			T255	12		T555	1		T538	9
values[5]	1633	1			T255	11		T555	1		T546	1
values[6]	1146	1			T255	8		T555	1		T415	8
values[7]	789	1			T255	6		T555	1		T415	4
values[8]	612	1			T255	4		T555	1		T415	1
values[9]	509	1			T255	6		T555	1		T718	6
values[10]	439	1			T255	11		T555	1		T718	12
values[11]	422	1			T255	13		T555	1		T718	8
values[12]	388	1			T255	7		T555	1		T718	7
values[13]	377	1			T255	9		T555	1		T718	6
values[14]	358	1			T255	8		T555	1		T718	12
values[15]	345	1			T255	8		T555	1		T718	6
values[16]	287	1			T255	6		T555	1		T718	3
values[17]	297	1			T255	10		T555	1		T718	3
values[18]	271	1			T255	8		T555	1		T718	6
values[19]	296	1			T255	10		T555	1		T718	16
values[20]	289	1			T255	8		T555	1		T718	8
values[21]	249	1			T255	4		T555	1		T718	4
values[22]	275	1			T255	6		T555	1		T718	3
values[23]	288	1			T255	3		T555	1		T718	3
values[24]	254	1			T255	3		T555	1		T718	5
values[25]	271	1			T255	4		T555	1		T718	7
values[26]	290	1			T255	4		T555	2		T718	8
values[27]	234	1			T255	2		T555	1		T718	8
values[28]	250	1			T255	3		T555	1		T718	7
values[29]	240	1			T255	2		T555	1		T718	15
values[30]	244	1			T255	3		T555	1		T718	6
values[31]	247	1			T255	2		T555	1		T718	3
values[32]	268	1			T255	9		T555	1		T718	9
values[33]	237	1			T255	6		T555	1		T718	9
values[34]	228	1			T255	4		T555	1		T718	5
values[35]	292	1			T255	3		T555	1		T718	11
values[36]	343	1			T255	6		T555	1		T718	4
values[37]	266	1			T255	7		T555	1		T718	3
values[38]	260	1			T255	2		T555	1		T718	17
values[39]	251	1			T255	7		T555	1		T718	13
values[40]	245	1			T255	2		T555	1		T718	15
values[41]	226	1			T255	9		T555	1		T718	3
values[42]	286	1			T255	16		T555	1		T718	4
values[43]	284	1			T255	5		T555	1		T718	12
values[44]	202	1			T255	3		T555	1		T718	6
values[45]	219	1			T255	3		T555	1		T718	7
values[46]	253	1			T255	4		T555	1		T718	6
values[47]	205	1			T255	6		T555	1		T718	5
values[48]	188	1			T255	8		T555	1		T718	6
values[49]	199	1			T255	4		T555	1		T718	8
values[50]	191	1			T255	5		T555	1		T718	5
values[51]	192	1			T255	5		T555	1		T718	3
values[52]	196	1			T255	6		T555	1		T718	3
values[53]	238	1			T255	10		T555	1		T718	4
values[54]	219	1			T255	5		T555	1		T718	7
values[55]	197	1			T255	5		T555	1		T718	6
values[56]	241	1			T255	2		T555	1		T718	8
values[57]	230	1			T255	8		T555	1		T718	22
values[58]	193	1			T255	5		T555	1		T718	8
values[59]	171	1			T255	3		T555	1		T718	14
values[60]	192	1			T255	4		T555	1		T718	4
values[61]	173	1			T255	3		T555	1		T718	5
values[62]	176	1			T255	5		T555	1		T718	3
values[63]	181	1			T255	7		T555	1		T718	13
values[64]	178	1			T255	4		T555	1		T718	4
values[65]	155	1			T255	5		T555	1		T718	3
values[66]	101	1			T255	7		T555	1		T718	8
values[67]	121	1			T255	6		T555	1		T718	4
values[68]	136	1			T255	3		T555	1		T718	20
values[69]	96	1			T255	5		T555	1		T725	1
values[70]	89	1			T255	5		T555	1		T725	1
values[71]	108	1			T255	7		T555	1		T725	1
values[72]	97	1			T255	9		T555	1		T725	1
values[73]	105	1			T255	9		T555	1		T725	1
values[74]	85	1			T255	16		T555	1		T725	1
values[75]	80	1			T255	12		T555	1		T725	1
values[76]	88	1			T255	20		T555	1		T725	1
values[77]	73	1			T255	15		T555	1		T725	1
values[78]	81	1			T255	17		T555	1		T725	1
values[79]	67	1			T255	9		T555	1		T725	1
values[80]	68	1			T255	10		T555	1		T725	1
values[81]	96	1			T255	14		T555	1		T725	1
values[82]	81	1			T255	6		T555	1		T725	1
values[83]	82	1			T255	4		T555	1		T725	4
values[84]	101	1			T255	10		T555	1		T725	3
values[85]	119	1			T255	14		T555	1		T725	1
values[86]	95	1			T255	18		T555	1		T725	2
values[87]	78	1			T255	8		T555	1		T725	4
values[88]	91	1			T255	8		T555	1		T725	4
values[89]	85	1			T255	8		T555	3		T725	4
values[90]	112	1			T255	5		T555	10		T725	2
values[91]	87	1			T255	5		T555	4		T725	1
values[92]	89	1			T255	5		T555	1		T725	2
values[93]	104	1			T255	12		T555	2		T725	2
values[94]	93	1			T255	3		T555	2		T725	3
values[95]	114	1			T255	12		T555	2		T725	1
values[96]	105	1			T255	7		T555	2		T725	3
values[97]	92	1			T255	6		T555	5		T725	3
values[98]	123	1			T255	8		T555	2		T725	3
values[99]	95	1			T255	9		T555	4		T725	6
values[100]	100	1			T255	3		T555	4		T725	1
values[101]	106	1			T255	14		T555	2		T725	1
values[102]	93	1			T255	17		T555	1		T725	2
values[103]	95	1			T255	12		T555	1		T725	3
values[104]	96	1			T255	7		T555	3		T725	1
values[105]	101	1			T255	3		T555	1		T725	3
values[106]	95	1			T255	7		T555	2		T725	1
values[107]	80	1			T255	12		T555	1		T725	2
values[108]	92	1			T255	6		T555	1		T725	8
values[109]	82	1			T255	7		T555	3		T725	3
values[110]	84	1			T255	8		T555	1		T725	3
values[111]	86	1			T255	17		T555	2		T725	1
values[112]	80	1			T255	11		T555	1		T725	5
values[113]	100	1			T255	17		T555	1		T725	2
values[114]	86	1			T255	14		T555	1		T725	1
values[115]	77	1			T255	11		T555	2		T725	3
values[116]	65	1			T255	5		T555	3		T725	2
values[117]	77	1			T255	2		T555	1		T725	2
values[118]	88	1			T255	9		T555	1		T725	1
values[119]	74	1			T255	7		T555	2		T725	1
values[120]	92	1			T255	10		T555	1		T725	2
values[121]	74	1			T255	7		T555	2		T725	3
values[122]	73	1			T255	6		T555	2		T725	2
values[123]	63	1			T255	9		T555	1		T725	2
values[124]	79	1			T255	6		T555	1		T725	2
values[125]	83	1			T255	5		T555	1		T725	1
values[126]	140	1			T255	10		T555	1		T725	1
values[127]	963	1			T255	54		T555	20		T725	31
values[128]	7658	1			T255	33		T555	249		T725	267