Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.kmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	172442	1			T73	24		T74	34		T75	184
values[2]	5956	1			T73	1		T74	1		T463	1
values[3]	2861	1			T545	1		T555	1		T538	38
values[4]	2001	1			T545	1		T555	1		T538	29
values[5]	1508	1			T545	1		T555	1		T538	30
values[6]	1168	1			T545	1		T555	1		T538	24
values[7]	997	1			T545	1		T555	1		T538	16
values[8]	1073	1			T545	1		T555	1		T538	9
values[9]	869	1			T545	1		T555	1		T538	3
values[10]	892	1			T545	1		T555	1		T725	1
values[11]	783	1			T545	1		T555	1		T725	1
values[12]	643	1			T545	1		T555	1		T725	1
values[13]	588	1			T545	1		T555	1		T725	1
values[14]	446	1			T545	1		T555	1		T725	1
values[15]	354	1			T545	1		T555	1		T725	1
values[16]	372	1			T545	1		T555	1		T725	1
values[17]	363	1			T545	1		T555	1		T725	1
values[18]	363	1			T545	1		T555	1		T725	1
values[19]	306	1			T545	1		T555	1		T725	1
values[20]	290	1			T545	1		T555	1		T725	1
values[21]	254	1			T545	1		T555	1		T725	1
values[22]	235	1			T545	1		T555	1		T725	1
values[23]	257	1			T545	1		T555	1		T725	1
values[24]	269	1			T545	1		T555	1		T725	1
values[25]	308	1			T545	1		T555	1		T725	1
values[26]	235	1			T545	1		T555	1		T725	1
values[27]	259	1			T545	1		T555	1		T725	1
values[28]	314	1			T545	1		T555	1		T725	1
values[29]	332	1			T545	1		T555	1		T725	1
values[30]	280	1			T545	1		T555	1		T725	1
values[31]	273	1			T545	1		T555	1		T725	1
values[32]	249	1			T545	1		T555	1		T725	1
values[33]	201	1			T545	1		T555	1		T725	1
values[34]	153	1			T545	1		T555	1		T725	1
values[35]	157	1			T545	1		T555	1		T725	1
values[36]	125	1			T545	1		T555	1		T725	1
values[37]	102	1			T545	1		T555	1		T725	1
values[38]	111	1			T545	1		T555	1		T725	1
values[39]	123	1			T545	1		T555	1		T725	1
values[40]	121	1			T545	1		T555	1		T725	1
values[41]	141	1			T545	2		T555	1		T725	1
values[42]	96	1			T545	1		T555	1		T725	1
values[43]	87	1			T545	1		T555	1		T725	1
values[44]	97	1			T545	1		T555	1		T725	1
values[45]	85	1			T545	1		T555	1		T725	1
values[46]	102	1			T545	1		T555	1		T725	1
values[47]	100	1			T545	1		T555	1		T725	1
values[48]	93	1			T545	1		T555	1		T725	1
values[49]	90	1			T545	1		T555	1		T725	1
values[50]	90	1			T545	1		T555	1		T725	1
values[51]	102	1			T545	1		T555	1		T725	1
values[52]	117	1			T545	1		T555	1		T725	1
values[53]	126	1			T545	1		T555	1		T725	1
values[54]	95	1			T545	1		T555	1		T725	1
values[55]	90	1			T545	1		T555	1		T725	1
values[56]	75	1			T545	1		T555	1		T725	1
values[57]	75	1			T545	1		T555	1		T725	1
values[58]	76	1			T545	1		T555	1		T725	1
values[59]	78	1			T545	1		T555	1		T725	1
values[60]	72	1			T545	1		T555	1		T725	1
values[61]	84	1			T545	1		T555	1		T725	1
values[62]	60	1			T545	1		T555	1		T725	1
values[63]	70	1			T545	1		T555	1		T725	1
values[64]	74	1			T545	1		T555	1		T725	1
values[65]	67	1			T545	1		T555	1		T725	1
values[66]	63	1			T545	1		T555	1		T725	1
values[67]	66	1			T545	1		T555	1		T725	1
values[68]	50	1			T545	1		T555	1		T725	1
values[69]	57	1			T545	1		T555	1		T725	1
values[70]	78	1			T545	1		T555	1		T725	1
values[71]	57	1			T545	1		T555	1		T725	1
values[72]	65	1			T545	1		T555	1		T725	1
values[73]	66	1			T545	1		T555	1		T725	1
values[74]	63	1			T545	1		T555	1		T725	1
values[75]	61	1			T545	1		T555	1		T725	1
values[76]	71	1			T545	1		T555	1		T725	1
values[77]	82	1			T545	1		T555	1		T725	1
values[78]	49	1			T545	1		T555	1		T725	1
values[79]	70	1			T545	1		T555	1		T725	1
values[80]	73	1			T545	1		T555	1		T725	1
values[81]	59	1			T545	1		T555	1		T725	1
values[82]	72	1			T545	1		T555	1		T725	1
values[83]	72	1			T545	1		T555	1		T725	1
values[84]	76	1			T545	1		T555	1		T725	1
values[85]	62	1			T545	1		T555	1		T725	1
values[86]	68	1			T545	1		T555	1		T725	1
values[87]	71	1			T545	1		T555	1		T725	1
values[88]	72	1			T545	1		T555	1		T725	1
values[89]	81	1			T545	1		T555	1		T725	1
values[90]	92	1			T545	1		T555	1		T725	1
values[91]	78	1			T545	1		T555	1		T725	1
values[92]	81	1			T545	1		T555	1		T725	1
values[93]	85	1			T545	1		T555	1		T725	1
values[94]	71	1			T545	1		T555	3		T725	1
values[95]	96	1			T545	1		T555	7		T725	1
values[96]	87	1			T545	1		T555	3		T725	1
values[97]	79	1			T545	1		T555	3		T725	1
values[98]	97	1			T545	1		T555	2		T725	1
values[99]	93	1			T545	1		T555	5		T725	1
values[100]	91	1			T545	1		T555	6		T725	1
values[101]	82	1			T545	1		T555	3		T725	1
values[102]	94	1			T545	1		T555	6		T725	1
values[103]	107	1			T545	1		T555	4		T725	1
values[104]	107	1			T545	1		T555	1		T725	1
values[105]	112	1			T545	1		T555	1		T725	1
values[106]	100	1			T545	1		T555	2		T725	1
values[107]	107	1			T545	1		T555	4		T725	1
values[108]	98	1			T545	1		T555	1		T725	1
values[109]	116	1			T545	1		T555	2		T725	1
values[110]	108	1			T545	1		T555	2		T725	1
values[111]	103	1			T545	1		T555	2		T725	1
values[112]	109	1			T545	1		T555	5		T725	1
values[113]	118	1			T545	2		T555	5		T725	1
values[114]	142	1			T545	2		T555	3		T725	1
values[115]	124	1			T545	4		T555	5		T725	1
values[116]	110	1			T545	5		T555	2		T725	1
values[117]	120	1			T545	3		T555	1		T725	1
values[118]	109	1			T545	3		T555	1		T725	1
values[119]	124	1			T545	3		T555	3		T725	1
values[120]	117	1			T545	2		T555	1		T725	1
values[121]	128	1			T545	4		T555	1		T725	1
values[122]	109	1			T545	2		T555	2		T725	2
values[123]	153	1			T545	2		T555	1		T725	1
values[124]	285	1			T545	1		T555	1		T725	1
values[125]	539	1			T545	2		T555	1		T725	1
values[126]	928	1			T545	15		T555	13		T725	14
values[127]	2738	1			T545	152		T555	101		T725	115
values[128]	4560	1			T545	237		T555	263		T725	205