Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_device_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	152441	1			T73	21		T74	29		T75	184
values[2]	11315	1			T73	1		T75	1		T255	5
values[3]	4150	1			T255	3		T545	1		T537	5
values[4]	2391	1			T255	3		T545	1		T537	7
values[5]	1550	1			T255	1		T545	1		T537	7
values[6]	1098	1			T255	4		T545	1		T537	8
values[7]	866	1			T255	1		T545	1		T537	4
values[8]	666	1			T255	3		T545	1		T537	13
values[9]	485	1			T255	2		T545	1		T537	5
values[10]	339	1			T255	2		T545	1		T537	10
values[11]	347	1			T255	2		T545	1		T537	16
values[12]	246	1			T255	1		T545	1		T537	10
values[13]	260	1			T255	1		T545	1		T537	5
values[14]	289	1			T255	3		T545	1		T537	21
values[15]	264	1			T255	2		T545	1		T537	3
values[16]	250	1			T255	4		T545	1		T537	4
values[17]	250	1			T255	2		T545	1		T537	9
values[18]	217	1			T255	2		T545	1		T537	4
values[19]	240	1			T255	1		T545	1		T537	7
values[20]	282	1			T255	2		T545	1		T537	19
values[21]	230	1			T255	5		T545	1		T537	9
values[22]	233	1			T255	4		T545	1		T537	10
values[23]	255	1			T255	2		T545	1		T537	7
values[24]	235	1			T255	2		T545	1		T537	3
values[25]	277	1			T255	3		T545	1		T537	7
values[26]	218	1			T255	3		T545	1		T537	5
values[27]	254	1			T255	6		T545	1		T537	7
values[28]	238	1			T255	8		T545	1		T537	10
values[29]	239	1			T255	2		T545	1		T537	8
values[30]	201	1			T255	1		T545	1		T537	6
values[31]	233	1			T255	1		T545	1		T537	10
values[32]	245	1			T255	2		T545	1		T537	16
values[33]	243	1			T255	5		T545	1		T537	26
values[34]	244	1			T255	2		T545	1		T537	8
values[35]	251	1			T255	4		T545	1		T537	6
values[36]	250	1			T255	3		T545	1		T537	7
values[37]	253	1			T255	4		T545	1		T537	12
values[38]	260	1			T255	4		T545	1		T537	4
values[39]	267	1			T255	3		T545	2		T725	1
values[40]	234	1			T255	4		T545	1		T725	1
values[41]	207	1			T255	1		T545	1		T725	1
values[42]	191	1			T255	2		T545	1		T725	1
values[43]	203	1			T255	5		T545	1		T725	1
values[44]	227	1			T255	4		T545	1		T725	1
values[45]	202	1			T255	8		T545	1		T725	1
values[46]	158	1			T255	8		T545	1		T725	1
values[47]	188	1			T255	3		T545	1		T725	1
values[48]	202	1			T255	7		T545	1		T725	1
values[49]	236	1			T255	3		T545	1		T725	1
values[50]	207	1			T255	2		T545	1		T725	1
values[51]	195	1			T255	1		T545	1		T725	1
values[52]	153	1			T255	1		T545	1		T725	1
values[53]	137	1			T255	3		T545	1		T725	1
values[54]	176	1			T255	8		T545	1		T725	1
values[55]	177	1			T255	2		T545	1		T725	1
values[56]	178	1			T255	2		T545	1		T725	1
values[57]	167	1			T255	1		T545	1		T725	1
values[58]	180	1			T255	2		T545	1		T725	1
values[59]	135	1			T255	7		T545	1		T725	1
values[60]	136	1			T255	4		T545	1		T725	1
values[61]	142	1			T255	2		T545	1		T725	1
values[62]	139	1			T255	2		T545	1		T725	1
values[63]	132	1			T255	3		T545	1		T725	1
values[64]	128	1			T255	1		T545	1		T725	1
values[65]	142	1			T255	1		T545	1		T725	1
values[66]	167	1			T255	6		T545	1		T725	1
values[67]	182	1			T255	12		T545	1		T725	1
values[68]	171	1			T255	7		T545	1		T725	1
values[69]	144	1			T255	5		T545	1		T725	1
values[70]	152	1			T255	14		T545	1		T725	1
values[71]	154	1			T255	10		T545	1		T725	1
values[72]	128	1			T255	13		T545	1		T725	1
values[73]	159	1			T255	17		T545	1		T725	1
values[74]	114	1			T255	9		T545	1		T725	1
values[75]	97	1			T255	4		T545	1		T725	1
values[76]	90	1			T255	5		T545	1		T725	1
values[77]	84	1			T255	4		T545	1		T725	1
values[78]	70	1			T255	3		T545	1		T725	1
values[79]	80	1			T255	6		T545	1		T725	1
values[80]	94	1			T255	6		T545	1		T725	1
values[81]	68	1			T255	7		T545	1		T725	1
values[82]	85	1			T255	8		T545	1		T725	1
values[83]	88	1			T255	15		T545	1		T725	1
values[84]	103	1			T255	15		T545	1		T725	1
values[85]	95	1			T255	9		T545	1		T725	1
values[86]	85	1			T255	10		T545	1		T725	1
values[87]	89	1			T255	3		T545	1		T725	1
values[88]	70	1			T545	1		T725	1		T839	5
values[89]	79	1			T545	1		T725	1		T839	6
values[90]	68	1			T545	1		T725	1		T839	6
values[91]	75	1			T545	1		T725	1		T839	7
values[92]	68	1			T545	1		T725	1		T839	5
values[93]	75	1			T545	1		T725	1		T839	8
values[94]	111	1			T545	1		T725	1		T839	4
values[95]	112	1			T545	1		T725	1		T839	13
values[96]	118	1			T545	1		T725	1		T839	15
values[97]	99	1			T545	1		T725	1		T839	11
values[98]	78	1			T545	1		T725	1		T839	5
values[99]	89	1			T545	1		T725	1		T839	8
values[100]	86	1			T545	1		T725	1		T839	2
values[101]	74	1			T545	1		T725	1		T839	4
values[102]	71	1			T545	3		T725	1		T839	9
values[103]	66	1			T545	3		T725	1		T839	6
values[104]	84	1			T545	5		T725	1		T839	7
values[105]	81	1			T545	1		T725	1		T839	5
values[106]	81	1			T545	4		T725	2		T839	8
values[107]	80	1			T545	3		T725	3		T839	10
values[108]	74	1			T545	1		T725	4		T839	3
values[109]	85	1			T545	1		T725	1		T839	4
values[110]	83	1			T545	1		T725	1		T526	4
values[111]	71	1			T545	2		T725	5		T526	4
values[112]	67	1			T545	4		T725	1		T526	4
values[113]	58	1			T545	4		T725	1		T526	3
values[114]	75	1			T545	2		T725	1		T526	1
values[115]	73	1			T545	3		T725	2		T526	3
values[116]	76	1			T545	1		T725	4		T526	2
values[117]	71	1			T545	2		T725	1		T526	5
values[118]	82	1			T545	3		T725	1		T526	10
values[119]	69	1			T545	1		T725	1		T526	5
values[120]	72	1			T545	2		T725	5		T526	3
values[121]	73	1			T545	2		T725	3		T526	4
values[122]	67	1			T545	2		T725	1		T526	1
values[123]	68	1			T545	2		T725	2		T526	3
values[124]	75	1			T545	1		T725	4		T526	5
values[125]	85	1			T545	1		T725	2		T526	22
values[126]	162	1			T545	3		T725	2		T526	27
values[127]	845	1			T545	32		T725	28		T526	61
values[128]	6648	1			T545	269		T725	344		T526	34