Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pwrmgr_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	131634	1			T70	28		T71	47		T72	49
values[2]	9436	1			T122	2		T256	1		T557	4
values[3]	3723	1			T555	1		T549	1		T709	1
values[4]	2168	1			T555	1		T558	9		T668	61
values[5]	1334	1			T555	2		T558	13		T668	70
values[6]	861	1			T555	1		T558	13		T668	39
values[7]	572	1			T555	1		T668	27		T866	2
values[8]	418	1			T555	1		T668	39		T866	2
values[9]	314	1			T555	1		T668	12		T866	2
values[10]	232	1			T555	1		T866	2		T483	2
values[11]	230	1			T555	1		T866	2		T483	9
values[12]	204	1			T555	1		T866	2		T483	9
values[13]	163	1			T555	1		T866	2		T477	7
values[14]	169	1			T555	1		T866	2		T477	8
values[15]	206	1			T555	1		T866	2		T477	5
values[16]	139	1			T555	1		T866	2		T477	4
values[17]	145	1			T555	1		T866	3		T477	5
values[18]	150	1			T555	1		T866	2		T477	8
values[19]	180	1			T555	1		T866	2		T477	18
values[20]	141	1			T555	1		T866	2		T477	9
values[21]	156	1			T555	1		T866	2		T477	3
values[22]	164	1			T555	1		T866	2		T477	4
values[23]	152	1			T555	1		T866	2		T477	6
values[24]	172	1			T555	1		T866	2		T477	5
values[25]	193	1			T555	1		T866	2		T477	6
values[26]	147	1			T555	1		T866	2		T477	8
values[27]	136	1			T555	1		T866	2		T477	9
values[28]	149	1			T555	1		T866	2		T477	9
values[29]	167	1			T555	1		T866	2		T477	9
values[30]	157	1			T555	1		T866	2		T477	6
values[31]	159	1			T555	1		T866	2		T477	10
values[32]	198	1			T555	1		T866	2		T477	11
values[33]	161	1			T555	1		T866	2		T477	11
values[34]	132	1			T555	1		T866	2		T477	13
values[35]	160	1			T555	1		T866	2		T477	4
values[36]	177	1			T555	1		T866	2		T477	4
values[37]	198	1			T555	1		T866	2		T477	5
values[38]	143	1			T555	1		T866	2		T477	4
values[39]	116	1			T555	1		T866	2		T477	4
values[40]	155	1			T555	1		T866	2		T477	5
values[41]	170	1			T555	1		T866	2		T477	5
values[42]	150	1			T555	1		T866	2		T477	16
values[43]	117	1			T555	1		T866	2		T477	18
values[44]	141	1			T555	1		T866	2		T477	16
values[45]	137	1			T555	1		T866	2		T477	10
values[46]	126	1			T555	1		T866	2		T477	4
values[47]	128	1			T555	1		T866	2		T477	8
values[48]	126	1			T555	1		T866	2		T477	19
values[49]	141	1			T555	1		T866	2		T477	14
values[50]	93	1			T555	1		T866	2		T477	7
values[51]	135	1			T555	1		T866	2		T477	6
values[52]	174	1			T555	1		T866	2		T477	12
values[53]	148	1			T555	1		T866	2		T477	5
values[54]	115	1			T555	1		T866	2		T477	3
values[55]	151	1			T555	1		T866	3		T477	3
values[56]	109	1			T555	1		T866	2		T477	3
values[57]	112	1			T555	1		T866	2		T477	5
values[58]	134	1			T555	1		T866	2		T477	7
values[59]	155	1			T555	1		T866	2		T477	6
values[60]	131	1			T555	1		T866	2		T477	7
values[61]	144	1			T555	1		T866	2		T477	6
values[62]	107	1			T555	1		T866	2		T477	7
values[63]	102	1			T555	1		T866	2		T477	14
values[64]	79	1			T555	1		T866	2		T477	6
values[65]	90	1			T555	1		T866	2		T880	1
values[66]	102	1			T555	1		T866	2		T880	1
values[67]	108	1			T555	1		T866	2		T880	1
values[68]	105	1			T555	1		T866	2		T880	1
values[69]	77	1			T555	1		T866	2		T880	1
values[70]	63	1			T555	1		T866	2		T880	1
values[71]	69	1			T555	1		T866	2		T880	1
values[72]	49	1			T555	1		T866	2		T880	1
values[73]	75	1			T555	1		T866	2		T880	1
values[74]	84	1			T555	1		T866	2		T880	1
values[75]	61	1			T555	1		T866	2		T880	1
values[76]	57	1			T555	1		T866	2		T880	1
values[77]	59	1			T555	1		T866	2		T880	1
values[78]	65	1			T555	1		T866	2		T880	1
values[79]	44	1			T555	1		T866	3		T880	1
values[80]	78	1			T555	1		T866	11		T880	1
values[81]	58	1			T555	1		T866	4		T880	1
values[82]	60	1			T555	1		T866	7		T880	1
values[83]	64	1			T555	1		T866	5		T880	1
values[84]	52	1			T555	1		T866	2		T880	1
values[85]	55	1			T555	1		T866	5		T880	1
values[86]	53	1			T555	1		T866	2		T880	1
values[87]	57	1			T555	1		T866	7		T880	1
values[88]	60	1			T555	1		T866	8		T880	2
values[89]	51	1			T555	1		T866	6		T880	1
values[90]	39	1			T555	1		T866	2		T880	1
values[91]	51	1			T555	1		T866	3		T880	1
values[92]	46	1			T555	1		T866	3		T880	1
values[93]	50	1			T555	1		T866	4		T880	1
values[94]	59	1			T555	1		T866	4		T880	1
values[95]	59	1			T555	1		T866	9		T880	1
values[96]	86	1			T555	1		T866	2		T880	1
values[97]	79	1			T555	1		T866	4		T880	1
values[98]	53	1			T555	1		T866	2		T880	1
values[99]	39	1			T555	1		T866	4		T880	1
values[100]	37	1			T555	1		T866	2		T880	1
values[101]	46	1			T555	1		T866	3		T880	1
values[102]	46	1			T555	1		T866	9		T880	1
values[103]	34	1			T555	1		T866	2		T880	1
values[104]	46	1			T555	1		T866	2		T880	2
values[105]	39	1			T555	1		T866	4		T880	1
values[106]	43	1			T555	1		T866	5		T880	1
values[107]	30	1			T555	1		T866	2		T880	3
values[108]	48	1			T555	1		T866	3		T880	1
values[109]	47	1			T555	1		T866	4		T880	3
values[110]	44	1			T555	1		T866	7		T880	3
values[111]	37	1			T555	1		T866	3		T880	1
values[112]	52	1			T555	1		T866	4		T880	2
values[113]	44	1			T555	1		T866	2		T880	1
values[114]	61	1			T555	1		T866	4		T880	4
values[115]	51	1			T555	1		T866	4		T880	5
values[116]	37	1			T555	1		T866	4		T880	2
values[117]	33	1			T555	1		T866	2		T880	2
values[118]	40	1			T555	1		T866	2		T880	2
values[119]	40	1			T555	1		T866	2		T880	1
values[120]	48	1			T555	2		T866	2		T880	1
values[121]	53	1			T555	3		T866	5		T880	1
values[122]	74	1			T555	5		T866	8		T880	5
values[123]	45	1			T555	2		T866	2		T880	1
values[124]	60	1			T555	3		T866	4		T880	1
values[125]	64	1			T555	1		T866	2		T880	4
values[126]	107	1			T555	2		T866	4		T880	6
values[127]	766	1			T555	34		T866	67		T880	43
values[128]	6525	1			T555	357		T866	606		T880	321