Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	132070	1			T70	25		T71	38		T72	43
values[2]	8782	1			T122	8		T255	1		T463	3
values[3]	3705	1			T566	1		T737	5		T544	1
values[4]	2200	1			T566	1		T737	5		T886	1
values[5]	1431	1			T566	1		T737	7		T886	1
values[6]	1011	1			T566	1		T737	8		T886	1
values[7]	679	1			T566	2		T737	12		T886	1
values[8]	487	1			T566	1		T737	15		T886	1
values[9]	513	1			T566	1		T737	12		T886	1
values[10]	401	1			T566	1		T737	6		T886	1
values[11]	439	1			T566	1		T737	11		T886	1
values[12]	412	1			T566	1		T737	2		T886	1
values[13]	355	1			T566	1		T737	3		T886	1
values[14]	356	1			T566	1		T737	4		T886	1
values[15]	277	1			T566	1		T737	4		T886	1
values[16]	328	1			T566	1		T737	7		T886	1
values[17]	350	1			T566	1		T737	3		T886	1
values[18]	334	1			T566	1		T737	6		T886	1
values[19]	347	1			T566	1		T737	29		T886	1
values[20]	286	1			T566	1		T737	9		T886	1
values[21]	277	1			T566	1		T737	6		T886	1
values[22]	279	1			T566	1		T737	9		T886	1
values[23]	335	1			T566	1		T737	6		T886	1
values[24]	289	1			T566	1		T737	3		T886	1
values[25]	339	1			T566	1		T737	7		T886	1
values[26]	319	1			T566	1		T737	6		T886	1
values[27]	277	1			T566	1		T737	5		T886	1
values[28]	342	1			T566	1		T737	13		T886	1
values[29]	305	1			T566	1		T737	5		T886	1
values[30]	336	1			T566	1		T737	17		T886	1
values[31]	320	1			T566	1		T737	12		T886	1
values[32]	265	1			T566	1		T737	4		T886	1
values[33]	313	1			T566	1		T737	6		T886	1
values[34]	370	1			T566	1		T737	14		T886	1
values[35]	330	1			T566	1		T737	9		T886	1
values[36]	327	1			T566	1		T737	5		T886	1
values[37]	281	1			T566	1		T737	5		T886	1
values[38]	288	1			T566	1		T737	7		T886	1
values[39]	262	1			T566	1		T737	5		T886	1
values[40]	273	1			T566	1		T737	9		T886	1
values[41]	311	1			T566	1		T737	8		T886	1
values[42]	306	1			T566	1		T737	3		T886	1
values[43]	284	1			T566	1		T737	7		T886	1
values[44]	295	1			T566	1		T737	7		T886	1
values[45]	296	1			T566	1		T737	10		T886	1
values[46]	263	1			T566	1		T737	9		T886	1
values[47]	249	1			T566	1		T737	11		T886	1
values[48]	280	1			T566	1		T737	9		T886	1
values[49]	244	1			T566	1		T737	7		T886	1
values[50]	238	1			T566	1		T737	6		T886	1
values[51]	285	1			T566	1		T737	5		T886	1
values[52]	259	1			T566	1		T737	8		T886	1
values[53]	249	1			T566	1		T737	6		T886	1
values[54]	289	1			T566	1		T737	3		T886	1
values[55]	261	1			T566	1		T737	6		T886	1
values[56]	283	1			T566	1		T737	16		T886	1
values[57]	266	1			T566	1		T737	6		T886	1
values[58]	211	1			T566	1		T737	3		T886	1
values[59]	258	1			T566	1		T737	11		T886	1
values[60]	196	1			T566	1		T737	6		T886	1
values[61]	149	1			T566	1		T737	4		T886	1
values[62]	187	1			T566	1		T737	3		T886	1
values[63]	171	1			T566	1		T886	1		T602	1
values[64]	159	1			T566	1		T886	1		T602	1
values[65]	185	1			T566	1		T886	1		T602	1
values[66]	146	1			T566	1		T886	1		T602	1
values[67]	146	1			T566	1		T886	1		T602	1
values[68]	141	1			T566	1		T886	1		T602	1
values[69]	131	1			T566	1		T886	1		T602	1
values[70]	163	1			T566	1		T886	1		T602	1
values[71]	150	1			T566	1		T886	1		T602	1
values[72]	114	1			T566	1		T886	1		T602	1
values[73]	110	1			T566	1		T886	1		T602	1
values[74]	92	1			T566	1		T886	1		T602	1
values[75]	74	1			T566	1		T886	1		T602	1
values[76]	90	1			T566	1		T886	1		T602	1
values[77]	58	1			T566	1		T886	1		T602	1
values[78]	71	1			T566	1		T886	1		T602	1
values[79]	66	1			T566	1		T886	1		T602	1
values[80]	69	1			T566	1		T886	1		T602	1
values[81]	65	1			T566	1		T886	1		T602	1
values[82]	61	1			T566	1		T886	1		T602	1
values[83]	51	1			T566	1		T886	1		T602	1
values[84]	66	1			T566	1		T886	1		T602	1
values[85]	61	1			T566	1		T886	2		T602	1
values[86]	67	1			T566	1		T886	3		T602	1
values[87]	64	1			T566	1		T886	9		T602	1
values[88]	65	1			T566	1		T886	7		T602	1
values[89]	69	1			T566	1		T886	3		T602	1
values[90]	67	1			T566	1		T886	2		T602	1
values[91]	61	1			T566	1		T886	2		T602	1
values[92]	71	1			T566	1		T886	3		T602	1
values[93]	70	1			T566	1		T886	1		T602	1
values[94]	74	1			T566	1		T886	8		T602	3
values[95]	75	1			T566	1		T886	1		T602	10
values[96]	68	1			T566	1		T886	7		T602	2
values[97]	74	1			T566	1		T886	2		T602	3
values[98]	65	1			T566	2		T886	2		T602	5
values[99]	72	1			T566	2		T886	1		T602	3
values[100]	89	1			T566	1		T886	1		T602	3
values[101]	75	1			T566	4		T886	2		T602	3
values[102]	88	1			T566	5		T886	3		T602	5
values[103]	74	1			T566	3		T886	1		T602	5
values[104]	80	1			T566	4		T886	4		T602	1
values[105]	81	1			T566	4		T886	3		T602	1
values[106]	76	1			T566	8		T886	1		T602	2
values[107]	67	1			T566	2		T886	3		T602	1
values[108]	80	1			T566	3		T886	1		T602	2
values[109]	63	1			T566	2		T886	1		T602	2
values[110]	61	1			T566	3		T886	2		T602	4
values[111]	57	1			T566	2		T886	1		T602	1
values[112]	59	1			T566	4		T886	4		T602	1
values[113]	62	1			T566	6		T886	2		T602	2
values[114]	69	1			T566	1		T886	1		T602	1
values[115]	80	1			T566	2		T886	2		T602	2
values[116]	70	1			T566	5		T886	5		T602	1
values[117]	69	1			T566	1		T886	2		T602	2
values[118]	53	1			T566	1		T886	1		T602	1
values[119]	62	1			T566	3		T886	1		T602	4
values[120]	52	1			T566	1		T886	1		T602	3
values[121]	53	1			T566	1		T886	3		T602	1
values[122]	64	1			T566	1		T886	4		T602	2
values[123]	56	1			T566	2		T886	1		T602	2
values[124]	64	1			T566	2		T886	2		T602	1
values[125]	60	1			T566	2		T886	1		T602	2
values[126]	101	1			T566	3		T886	5		T602	2
values[127]	877	1			T566	28		T886	38		T602	35
values[128]	8187	1			T566	261		T886	314		T602	303