Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.edn1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	152739	1			T70	20		T71	42		T72	46
values[2]	4326	1			T122	3		T255	2		T557	1
values[3]	2152	1			T558	7		T878	1		T668	44
values[4]	1679	1			T558	1		T668	33		T480	5
values[5]	1363	1			T668	35		T480	4		T510	56
values[6]	1167	1			T668	19		T480	3		T510	92
values[7]	943	1			T668	23		T480	6		T510	74
values[8]	775	1			T668	7		T480	3		T510	51
values[9]	612	1			T668	3		T480	6		T510	28
values[10]	619	1			T668	5		T480	3		T510	20
values[11]	596	1			T668	2		T480	3		T869	29
values[12]	544	1			T668	5		T480	2		T869	37
values[13]	501	1			T668	8		T480	2		T869	40
values[14]	468	1			T668	6		T480	4		T869	43
values[15]	457	1			T668	2		T480	3		T869	30
values[16]	419	1			T668	1		T480	4		T869	17
values[17]	354	1			T668	3		T480	2		T869	12
values[18]	343	1			T668	7		T480	4		T869	10
values[19]	316	1			T668	2		T480	6		T869	7
values[20]	295	1			T668	1		T480	6		T869	11
values[21]	362	1			T668	3		T480	4		T869	11
values[22]	294	1			T668	3		T480	5		T869	16
values[23]	282	1			T668	7		T480	9		T869	23
values[24]	283	1			T668	27		T480	5		T869	22
values[25]	250	1			T668	18		T480	7		T869	16
values[26]	232	1			T668	7		T480	5		T869	3
values[27]	271	1			T668	9		T480	5		T869	13
values[28]	259	1			T668	15		T480	4		T869	16
values[29]	177	1			T668	11		T480	6		T869	13
values[30]	173	1			T668	19		T480	4		T869	9
values[31]	159	1			T668	16		T480	5		T869	10
values[32]	136	1			T668	11		T480	2		T867	21
values[33]	158	1			T668	8		T480	5		T867	35
values[34]	149	1			T480	3		T867	24		T879	10
values[35]	165	1			T480	7		T867	15		T879	18
values[36]	153	1			T480	5		T867	6		T879	23
values[37]	138	1			T480	3		T867	1		T879	15
values[38]	153	1			T480	2		T879	13		T880	1
values[39]	126	1			T480	3		T879	15		T880	1
values[40]	122	1			T480	4		T879	14		T880	1
values[41]	103	1			T480	3		T879	22		T880	2
values[42]	95	1			T480	5		T879	23		T880	1
values[43]	87	1			T480	3		T879	24		T880	1
values[44]	116	1			T480	4		T879	43		T880	1
values[45]	96	1			T480	7		T879	27		T880	1
values[46]	75	1			T480	6		T879	10		T880	1
values[47]	63	1			T480	6		T879	3		T880	1
values[48]	54	1			T480	3		T880	1		T881	1
values[49]	60	1			T480	8		T880	1		T881	1
values[50]	61	1			T480	4		T880	1		T881	1
values[51]	62	1			T480	6		T880	1		T881	2
values[52]	66	1			T480	4		T880	1		T881	1
values[53]	66	1			T480	5		T880	1		T881	1
values[54]	74	1			T480	7		T880	1		T881	1
values[55]	69	1			T480	3		T880	1		T881	1
values[56]	66	1			T480	5		T880	1		T881	1
values[57]	64	1			T480	4		T880	1		T881	1
values[58]	66	1			T480	2		T880	1		T881	1
values[59]	77	1			T480	7		T880	2		T881	1
values[60]	65	1			T480	7		T880	1		T881	1
values[61]	56	1			T480	6		T880	1		T881	1
values[62]	58	1			T480	2		T880	1		T881	1
values[63]	65	1			T480	3		T880	1		T881	1
values[64]	56	1			T480	4		T880	1		T881	1
values[65]	52	1			T480	2		T880	1		T881	1
values[66]	68	1			T480	6		T880	1		T881	1
values[67]	62	1			T480	9		T880	1		T881	1
values[68]	64	1			T480	5		T880	1		T881	1
values[69]	71	1			T480	10		T880	1		T881	1
values[70]	60	1			T480	4		T880	1		T881	1
values[71]	58	1			T480	5		T880	1		T881	1
values[72]	67	1			T480	8		T880	1		T881	1
values[73]	68	1			T480	6		T880	1		T881	1
values[74]	78	1			T480	4		T880	1		T881	1
values[75]	72	1			T480	2		T880	1		T881	1
values[76]	66	1			T480	3		T880	1		T881	1
values[77]	66	1			T480	3		T880	1		T881	1
values[78]	66	1			T480	5		T880	1		T881	1
values[79]	73	1			T480	4		T880	1		T881	1
values[80]	86	1			T480	6		T880	1		T881	1
values[81]	102	1			T480	10		T880	1		T881	1
values[82]	94	1			T480	6		T880	1		T881	3
values[83]	97	1			T480	7		T880	1		T881	1
values[84]	89	1			T480	8		T880	1		T881	1
values[85]	78	1			T480	4		T880	1		T881	6
values[86]	94	1			T480	5		T880	1		T881	1
values[87]	89	1			T480	5		T880	1		T881	1
values[88]	83	1			T480	4		T880	1		T881	4
values[89]	91	1			T480	5		T880	1		T881	4
values[90]	108	1			T480	5		T880	1		T881	1
values[91]	107	1			T480	4		T880	1		T881	2
values[92]	102	1			T480	3		T880	1		T881	2
values[93]	88	1			T480	9		T880	1		T881	2
values[94]	94	1			T480	11		T880	1		T881	5
values[95]	94	1			T480	12		T880	1		T881	2
values[96]	93	1			T480	5		T880	1		T881	2
values[97]	89	1			T480	2		T880	1		T881	2
values[98]	85	1			T480	9		T880	1		T881	6
values[99]	91	1			T480	6		T880	1		T881	1
values[100]	117	1			T480	10		T880	1		T881	2
values[101]	93	1			T480	4		T880	1		T881	4
values[102]	106	1			T480	7		T880	1		T881	2
values[103]	95	1			T480	13		T880	1		T881	4
values[104]	107	1			T480	15		T880	1		T881	1
values[105]	104	1			T480	10		T880	1		T881	5
values[106]	101	1			T480	20		T880	1		T881	2
values[107]	110	1			T480	12		T880	1		T881	5
values[108]	89	1			T480	9		T880	1		T881	1
values[109]	116	1			T480	8		T880	1		T881	1
values[110]	117	1			T480	12		T880	1		T881	2
values[111]	113	1			T480	14		T880	1		T881	4
values[112]	94	1			T480	9		T880	1		T881	2
values[113]	100	1			T480	8		T880	1		T881	2
values[114]	126	1			T480	6		T880	1		T881	3
values[115]	113	1			T480	13		T880	1		T881	2
values[116]	108	1			T480	7		T880	1		T881	2
values[117]	110	1			T480	10		T880	1		T881	1
values[118]	120	1			T480	10		T880	1		T881	2
values[119]	115	1			T480	8		T880	1		T881	1
values[120]	123	1			T480	10		T880	1		T881	2
values[121]	134	1			T480	10		T880	1		T881	3
values[122]	146	1			T480	16		T880	1		T881	1
values[123]	174	1			T480	20		T880	3		T881	2
values[124]	266	1			T480	54		T880	5		T881	4
values[125]	528	1			T480	92		T880	1		T881	5
values[126]	1001	1			T480	132		T880	15		T881	7
values[127]	2988	1			T480	76		T880	98		T881	72
values[128]	5149	1			T480	7		T880	172		T881	184