Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	136161	1			T77	3		T78	24		T79	8
values[2]	10110	1			T78	1		T266	1		T255	2
values[3]	3756	1			T547	116		T490	66		T555	1
values[4]	2135	1			T547	68		T490	13		T555	1
values[5]	1430	1			T547	45		T490	3		T555	1
values[6]	1017	1			T547	54		T555	1		T703	37
values[7]	775	1			T547	53		T555	1		T703	24
values[8]	612	1			T547	60		T555	1		T703	21
values[9]	542	1			T547	59		T555	1		T703	14
values[10]	449	1			T547	52		T555	1		T703	16
values[11]	443	1			T547	29		T555	1		T703	19
values[12]	352	1			T547	17		T555	1		T703	7
values[13]	344	1			T547	5		T555	1		T703	7
values[14]	317	1			T555	1		T703	7		T832	1
values[15]	278	1			T555	1		T703	4		T832	1
values[16]	295	1			T555	1		T703	7		T832	1
values[17]	261	1			T555	1		T703	4		T832	1
values[18]	293	1			T555	1		T703	10		T832	1
values[19]	313	1			T555	1		T703	7		T832	1
values[20]	318	1			T555	1		T703	17		T832	1
values[21]	336	1			T555	1		T703	5		T832	1
values[22]	311	1			T555	1		T703	11		T832	1
values[23]	238	1			T555	1		T703	7		T832	1
values[24]	233	1			T555	1		T703	4		T832	1
values[25]	269	1			T555	1		T703	9		T832	1
values[26]	317	1			T555	1		T703	15		T832	1
values[27]	278	1			T555	1		T703	5		T832	1
values[28]	301	1			T555	1		T703	2		T832	1
values[29]	286	1			T555	1		T703	4		T832	1
values[30]	282	1			T555	1		T703	10		T832	1
values[31]	348	1			T555	1		T703	26		T832	1
values[32]	289	1			T555	1		T703	5		T832	1
values[33]	241	1			T555	1		T703	7		T832	1
values[34]	250	1			T555	1		T703	3		T832	1
values[35]	311	1			T555	1		T703	6		T832	1
values[36]	297	1			T555	1		T703	6		T832	1
values[37]	261	1			T555	2		T703	3		T832	1
values[38]	263	1			T555	1		T703	18		T832	1
values[39]	250	1			T555	1		T703	3		T832	1
values[40]	280	1			T555	1		T703	6		T832	1
values[41]	251	1			T555	1		T703	4		T832	1
values[42]	268	1			T555	1		T703	6		T832	1
values[43]	282	1			T555	1		T703	5		T832	1
values[44]	243	1			T555	1		T703	7		T832	1
values[45]	198	1			T555	1		T703	7		T832	1
values[46]	251	1			T555	1		T703	7		T832	1
values[47]	236	1			T555	1		T703	8		T832	1
values[48]	245	1			T555	1		T703	7		T832	1
values[49]	211	1			T555	1		T832	1		T837	2
values[50]	182	1			T555	1		T832	1		T837	9
values[51]	194	1			T555	1		T832	1		T837	4
values[52]	172	1			T555	1		T832	1		T837	1
values[53]	215	1			T555	1		T832	1		T837	1
values[54]	190	1			T555	1		T832	1		T837	3
values[55]	204	1			T555	1		T832	1		T837	3
values[56]	178	1			T555	1		T832	1		T837	3
values[57]	179	1			T555	1		T832	1		T837	7
values[58]	175	1			T555	1		T832	1		T837	3
values[59]	169	1			T555	1		T832	1		T837	2
values[60]	165	1			T555	1		T832	1		T837	4
values[61]	154	1			T555	1		T832	1		T837	1
values[62]	129	1			T555	1		T832	1		T837	2
values[63]	116	1			T555	1		T832	1		T837	5
values[64]	108	1			T555	1		T832	1		T837	4
values[65]	124	1			T555	1		T832	2		T837	7
values[66]	102	1			T555	1		T832	1		T837	8
values[67]	77	1			T555	1		T832	1		T837	1
values[68]	60	1			T555	1		T832	1		T837	4
values[69]	77	1			T555	1		T832	1		T837	6
values[70]	71	1			T555	1		T832	1		T837	10
values[71]	64	1			T555	1		T832	1		T837	1
values[72]	73	1			T555	1		T832	1		T837	1
values[73]	59	1			T555	1		T832	1		T837	2
values[74]	56	1			T555	1		T832	1		T837	3
values[75]	62	1			T555	1		T832	1		T837	1
values[76]	51	1			T555	1		T832	1		T837	2
values[77]	62	1			T555	1		T832	1		T837	1
values[78]	50	1			T555	1		T832	1		T837	4
values[79]	69	1			T555	5		T832	1		T837	1
values[80]	57	1			T555	9		T832	1		T837	2
values[81]	56	1			T555	2		T832	1		T837	2
values[82]	57	1			T555	9		T832	1		T837	2
values[83]	53	1			T555	4		T832	1		T837	1
values[84]	65	1			T555	1		T832	1		T837	2
values[85]	71	1			T555	2		T832	1		T837	7
values[86]	60	1			T555	3		T832	1		T837	1
values[87]	69	1			T555	5		T832	1		T837	11
values[88]	62	1			T555	2		T832	1		T837	5
values[89]	60	1			T555	2		T832	1		T837	2
values[90]	41	1			T555	1		T832	1		T837	1
values[91]	58	1			T555	10		T832	1		T837	2
values[92]	67	1			T555	1		T832	1		T837	4
values[93]	63	1			T555	3		T832	1		T837	4
values[94]	47	1			T555	1		T832	1		T837	1
values[95]	53	1			T555	4		T832	1		T837	4
values[96]	66	1			T555	8		T832	1		T837	3
values[97]	54	1			T555	3		T832	1		T837	1
values[98]	56	1			T555	4		T832	1		T837	5
values[99]	54	1			T555	3		T832	1		T837	1
values[100]	54	1			T555	1		T832	1		T837	3
values[101]	59	1			T555	1		T832	1		T837	6
values[102]	60	1			T555	1		T832	1		T837	3
values[103]	62	1			T555	1		T832	1		T837	1
values[104]	57	1			T555	3		T832	1		T837	5
values[105]	53	1			T555	2		T832	1		T837	4
values[106]	65	1			T555	3		T832	2		T837	8
values[107]	79	1			T555	2		T832	1		T837	16
values[108]	65	1			T555	2		T832	1		T837	5
values[109]	69	1			T555	1		T832	1		T837	8
values[110]	89	1			T555	3		T832	1		T837	8
values[111]	72	1			T555	5		T832	1		T837	6
values[112]	67	1			T555	1		T832	1		T837	8
values[113]	75	1			T555	2		T832	1		T837	5
values[114]	89	1			T555	4		T832	1		T837	2
values[115]	75	1			T555	2		T832	1		T700	22
values[116]	66	1			T555	2		T832	1		T700	4
values[117]	80	1			T555	2		T832	1		T700	3
values[118]	71	1			T555	1		T832	1		T700	9
values[119]	65	1			T555	5		T832	2		T700	9
values[120]	72	1			T555	3		T832	2		T700	2
values[121]	54	1			T555	1		T832	2		T700	2
values[122]	57	1			T555	2		T832	2		T700	4
values[123]	83	1			T555	1		T832	2		T700	10
values[124]	88	1			T555	1		T832	1		T700	4
values[125]	93	1			T555	2		T832	2		T700	6
values[126]	178	1			T555	2		T832	2		T700	14
values[127]	1003	1			T555	19		T832	37		T700	17
values[128]	7176	1			T555	245		T832	235		T700	1