Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.keymgr_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	154325	1			T77	3		T78	15		T79	14
values[2]	4860	1			T547	5		T490	5		T555	2
values[3]	2601	1			T547	6		T555	2		T839	1
values[4]	1918	1			T547	16		T555	2		T571	1
values[5]	1542	1			T547	11		T555	2		T832	2
values[6]	1307	1			T547	8		T555	2		T832	2
values[7]	1151	1			T547	2		T555	2		T832	2
values[8]	1101	1			T547	1		T555	2		T832	2
values[9]	987	1			T547	6		T555	2		T832	2
values[10]	821	1			T547	14		T555	2		T832	2
values[11]	800	1			T547	21		T555	2		T832	2
values[12]	690	1			T547	10		T555	2		T832	2
values[13]	579	1			T547	13		T555	2		T832	2
values[14]	465	1			T547	2		T555	2		T832	2
values[15]	402	1			T547	10		T555	2		T832	2
values[16]	428	1			T547	5		T555	3		T832	2
values[17]	412	1			T547	21		T555	2		T832	2
values[18]	361	1			T547	41		T555	2		T832	2
values[19]	326	1			T547	37		T555	2		T832	2
values[20]	250	1			T547	25		T555	2		T832	2
values[21]	249	1			T547	19		T555	2		T832	2
values[22]	275	1			T547	19		T555	2		T832	2
values[23]	295	1			T547	27		T555	2		T832	2
values[24]	238	1			T547	16		T555	2		T832	2
values[25]	208	1			T547	10		T555	2		T832	2
values[26]	172	1			T547	12		T555	2		T832	2
values[27]	174	1			T547	27		T555	2		T832	2
values[28]	184	1			T547	55		T555	2		T832	2
values[29]	159	1			T547	32		T555	2		T832	2
values[30]	162	1			T547	35		T555	2		T832	2
values[31]	140	1			T547	18		T555	2		T832	2
values[32]	103	1			T547	3		T555	2		T832	2
values[33]	106	1			T547	6		T555	2		T832	2
values[34]	98	1			T555	2		T832	2		T840	1
values[35]	114	1			T555	2		T832	2		T840	1
values[36]	136	1			T555	2		T832	2		T840	1
values[37]	115	1			T555	2		T832	2		T840	1
values[38]	109	1			T555	2		T832	2		T840	1
values[39]	105	1			T555	2		T832	2		T840	1
values[40]	104	1			T555	2		T832	2		T840	1
values[41]	105	1			T555	2		T832	2		T840	1
values[42]	113	1			T555	2		T832	2		T840	1
values[43]	84	1			T555	2		T832	2		T840	1
values[44]	103	1			T555	2		T832	2		T840	1
values[45]	93	1			T555	2		T832	2		T840	1
values[46]	72	1			T555	2		T832	2		T840	1
values[47]	92	1			T555	2		T832	2		T840	1
values[48]	85	1			T555	2		T832	2		T840	1
values[49]	64	1			T555	2		T832	2		T840	1
values[50]	56	1			T555	2		T832	2		T840	1
values[51]	54	1			T555	2		T832	2		T840	1
values[52]	46	1			T555	2		T832	2		T840	1
values[53]	42	1			T555	2		T832	2		T840	1
values[54]	58	1			T555	2		T832	2		T840	1
values[55]	53	1			T555	2		T832	2		T840	1
values[56]	59	1			T555	2		T832	2		T840	1
values[57]	58	1			T555	2		T832	2		T840	1
values[58]	61	1			T555	2		T832	2		T840	1
values[59]	54	1			T555	2		T832	2		T840	1
values[60]	53	1			T555	2		T832	2		T840	1
values[61]	65	1			T555	2		T832	2		T840	1
values[62]	77	1			T555	2		T832	2		T840	1
values[63]	70	1			T555	2		T832	2		T840	1
values[64]	61	1			T555	2		T832	2		T840	1
values[65]	54	1			T555	2		T832	3		T840	1
values[66]	54	1			T555	2		T832	2		T840	1
values[67]	47	1			T555	2		T832	2		T840	1
values[68]	49	1			T555	2		T832	2		T840	1
values[69]	47	1			T555	2		T832	2		T840	1
values[70]	45	1			T555	2		T832	2		T840	1
values[71]	51	1			T555	2		T832	2		T840	1
values[72]	58	1			T555	2		T832	2		T840	1
values[73]	62	1			T555	2		T832	2		T840	1
values[74]	59	1			T555	2		T832	2		T840	1
values[75]	55	1			T555	2		T832	2		T840	1
values[76]	53	1			T555	2		T832	2		T840	1
values[77]	61	1			T555	2		T832	2		T840	1
values[78]	68	1			T555	2		T832	2		T840	1
values[79]	68	1			T555	2		T832	2		T840	1
values[80]	62	1			T555	2		T832	2		T840	1
values[81]	62	1			T555	2		T832	2		T840	1
values[82]	56	1			T555	2		T832	2		T840	1
values[83]	55	1			T555	2		T832	2		T840	1
values[84]	71	1			T555	2		T832	2		T840	1
values[85]	74	1			T555	2		T832	2		T840	1
values[86]	54	1			T555	2		T832	2		T840	1
values[87]	56	1			T555	2		T832	2		T840	1
values[88]	66	1			T555	2		T832	2		T840	1
values[89]	81	1			T555	2		T832	5		T840	1
values[90]	62	1			T555	2		T832	3		T840	1
values[91]	66	1			T555	2		T832	2		T840	1
values[92]	67	1			T555	2		T832	2		T840	1
values[93]	65	1			T555	2		T832	4		T840	1
values[94]	91	1			T555	3		T832	4		T840	2
values[95]	92	1			T555	2		T832	3		T840	1
values[96]	75	1			T555	2		T832	4		T840	1
values[97]	69	1			T555	2		T832	7		T840	1
values[98]	81	1			T555	2		T832	4		T840	1
values[99]	69	1			T555	2		T832	3		T840	1
values[100]	77	1			T555	2		T832	5		T840	1
values[101]	85	1			T555	2		T832	2		T840	1
values[102]	83	1			T555	2		T832	2		T840	1
values[103]	73	1			T555	2		T832	3		T840	1
values[104]	99	1			T555	2		T832	5		T840	1
values[105]	86	1			T555	2		T832	2		T840	1
values[106]	96	1			T555	3		T832	2		T840	1
values[107]	78	1			T555	4		T832	2		T840	1
values[108]	93	1			T555	3		T832	6		T840	1
values[109]	109	1			T555	5		T832	6		T840	1
values[110]	80	1			T555	3		T832	2		T840	3
values[111]	77	1			T555	2		T832	6		T840	1
values[112]	87	1			T555	4		T832	6		T840	2
values[113]	82	1			T555	3		T832	2		T840	1
values[114]	86	1			T555	2		T832	2		T840	2
values[115]	81	1			T555	5		T832	4		T840	1
values[116]	103	1			T555	4		T832	7		T840	2
values[117]	102	1			T555	3		T832	4		T840	7
values[118]	92	1			T555	4		T832	3		T840	3
values[119]	84	1			T555	2		T832	2		T840	5
values[120]	88	1			T555	3		T832	2		T840	2
values[121]	88	1			T555	3		T832	3		T840	1
values[122]	87	1			T555	3		T832	4		T840	2
values[123]	109	1			T555	4		T832	6		T840	1
values[124]	148	1			T555	4		T832	2		T840	2
values[125]	312	1			T555	2		T832	4		T840	1
values[126]	735	1			T555	20		T832	18		T840	9
values[127]	3146	1			T555	214		T832	218		T840	98
values[128]	5804	1			T555	485		T832	394		T840	179