Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_device_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	135749	1			T77	7		T78	22		T79	6
values[2]	8740	1			T77	1		T123	1		T254	11
values[3]	3360	1			T254	8		T490	114		T550	8
values[4]	1926	1			T254	2		T490	84		T550	2
values[5]	1231	1			T254	9		T490	26		T550	6
values[6]	835	1			T254	5		T490	8		T550	3
values[7]	632	1			T254	5		T490	3		T550	13
values[8]	432	1			T254	15		T550	3		T703	5
values[9]	407	1			T254	8		T550	3		T703	5
values[10]	317	1			T254	4		T550	10		T703	5
values[11]	321	1			T254	17		T550	13		T467	7
values[12]	298	1			T254	4		T550	8		T467	8
values[13]	248	1			T254	3		T550	9		T467	6
values[14]	312	1			T254	5		T550	4		T467	15
values[15]	290	1			T254	7		T550	6		T467	12
values[16]	267	1			T254	8		T550	4		T467	13
values[17]	230	1			T254	6		T550	4		T467	3
values[18]	219	1			T254	12		T550	6		T467	8
values[19]	227	1			T254	12		T550	12		T467	8
values[20]	225	1			T254	13		T550	7		T467	6
values[21]	297	1			T254	5		T550	6		T467	3
values[22]	240	1			T254	3		T550	7		T467	5
values[23]	257	1			T254	7		T550	16		T467	3
values[24]	244	1			T254	9		T550	4		T467	10
values[25]	230	1			T254	16		T550	8		T467	10
values[26]	252	1			T254	7		T550	4		T467	4
values[27]	177	1			T254	6		T550	5		T467	7
values[28]	240	1			T254	8		T550	5		T467	9
values[29]	211	1			T254	3		T550	8		T467	9
values[30]	227	1			T254	7		T550	4		T467	18
values[31]	213	1			T254	4		T550	8		T467	5
values[32]	227	1			T254	3		T550	11		T467	15
values[33]	213	1			T254	5		T550	9		T467	10
values[34]	193	1			T254	7		T550	5		T467	4
values[35]	224	1			T254	5		T550	8		T467	5
values[36]	222	1			T254	21		T550	7		T467	10
values[37]	232	1			T254	18		T550	4		T467	3
values[38]	198	1			T254	4		T550	7		T467	7
values[39]	214	1			T254	3		T550	8		T467	6
values[40]	203	1			T254	10		T550	3		T467	6
values[41]	216	1			T254	3		T550	6		T467	13
values[42]	207	1			T254	5		T550	5		T467	6
values[43]	177	1			T254	6		T550	6		T467	6
values[44]	199	1			T254	3		T550	7		T467	3
values[45]	201	1			T254	4		T550	12		T467	5
values[46]	193	1			T254	3		T550	4		T467	6
values[47]	205	1			T254	3		T550	11		T467	4
values[48]	219	1			T254	8		T550	7		T467	3
values[49]	196	1			T254	3		T550	21		T467	3
values[50]	188	1			T254	7		T550	7		T467	5
values[51]	169	1			T254	6		T550	11		T467	3
values[52]	185	1			T254	7		T550	23		T467	4
values[53]	197	1			T254	11		T550	7		T467	8
values[54]	202	1			T254	6		T550	5		T467	7
values[55]	205	1			T254	9		T550	10		T467	12
values[56]	232	1			T254	14		T550	9		T467	24
values[57]	159	1			T254	9		T550	5		T835	4
values[58]	158	1			T254	2		T550	5		T835	3
values[59]	162	1			T254	4		T550	6		T835	6
values[60]	132	1			T254	9		T550	3		T835	2
values[61]	135	1			T254	5		T550	4		T835	7
values[62]	165	1			T254	5		T550	7		T835	11
values[63]	169	1			T254	14		T550	5		T835	6
values[64]	128	1			T254	11		T550	6		T835	8
values[65]	175	1			T254	4		T550	10		T835	7
values[66]	155	1			T254	7		T550	9		T835	4
values[67]	162	1			T254	4		T550	4		T835	9
values[68]	137	1			T254	5		T835	2		T861	1
values[69]	136	1			T254	8		T835	3		T861	1
values[70]	99	1			T254	8		T835	4		T861	1
values[71]	107	1			T254	10		T835	3		T861	1
values[72]	128	1			T254	16		T835	5		T861	1
values[73]	103	1			T254	7		T835	2		T861	1
values[74]	101	1			T835	8		T861	1		T876	4
values[75]	84	1			T835	10		T861	1		T876	4
values[76]	83	1			T835	9		T861	1		T876	4
values[77]	60	1			T835	5		T861	1		T876	4
values[78]	81	1			T835	8		T861	1		T876	10
values[79]	65	1			T835	10		T861	2		T876	2
values[80]	71	1			T835	11		T861	2		T876	6
values[81]	84	1			T835	9		T861	9		T876	5
values[82]	80	1			T835	5		T861	5		T876	12
values[83]	74	1			T835	3		T861	3		T876	15
values[84]	73	1			T835	5		T861	2		T876	15
values[85]	70	1			T835	4		T861	4		T876	11
values[86]	87	1			T835	6		T861	1		T876	5
values[87]	82	1			T835	3		T861	1		T876	10
values[88]	76	1			T835	8		T861	3		T876	4
values[89]	96	1			T835	14		T861	8		T876	7
values[90]	91	1			T835	17		T861	6		T876	6
values[91]	77	1			T835	8		T861	10		T876	7
values[92]	83	1			T835	6		T861	1		T876	6
values[93]	85	1			T835	9		T861	3		T876	2
values[94]	95	1			T835	10		T861	3		T876	6
values[95]	89	1			T835	3		T861	5		T876	4
values[96]	81	1			T835	6		T861	14		T876	10
values[97]	73	1			T835	5		T861	4		T876	3
values[98]	81	1			T835	7		T861	1		T876	3
values[99]	74	1			T835	5		T861	5		T876	5
values[100]	79	1			T835	6		T861	1		T876	6
values[101]	74	1			T835	9		T861	1		T876	5
values[102]	79	1			T835	18		T861	1		T876	12
values[103]	82	1			T835	6		T861	1		T876	5
values[104]	95	1			T835	16		T861	1		T876	13
values[105]	98	1			T835	12		T861	4		T876	15
values[106]	95	1			T835	13		T861	1		T876	9
values[107]	84	1			T835	11		T861	4		T876	10
values[108]	81	1			T835	11		T861	3		T876	8
values[109]	65	1			T835	7		T861	1		T876	5
values[110]	78	1			T835	3		T861	6		T876	5
values[111]	85	1			T835	7		T861	1		T876	12
values[112]	79	1			T835	14		T861	1		T876	4
values[113]	73	1			T835	6		T861	1		T876	10
values[114]	110	1			T835	18		T861	3		T876	8
values[115]	82	1			T835	10		T861	2		T876	6
values[116]	69	1			T835	9		T861	2		T876	5
values[117]	76	1			T835	7		T861	1		T876	11
values[118]	99	1			T835	7		T861	2		T876	14
values[119]	69	1			T835	4		T861	1		T876	14
values[120]	89	1			T835	6		T861	2		T876	19
values[121]	66	1			T835	8		T861	1		T876	4
values[122]	96	1			T835	17		T861	2		T876	8
values[123]	67	1			T835	11		T861	5		T876	3
values[124]	59	1			T835	5		T861	1		T876	2
values[125]	44	1			T835	3		T861	2		T876	4
values[126]	116	1			T835	2		T861	3		T876	17
values[127]	759	1			T835	6		T861	29		T876	25
values[128]	6450	1			T835	1		T861	240		T876	16