Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	133633	1			T78	18		T79	12		T84	8
values[2]	8995	1			T84	2		T123	1		T553	1
values[3]	3571	1			T547	2		T550	3		T703	42
values[4]	2200	1			T547	5		T550	15		T703	32
values[5]	1434	1			T547	2		T550	14		T703	21
values[6]	1061	1			T547	2		T550	3		T703	29
values[7]	781	1			T547	2		T550	7		T703	15
values[8]	603	1			T547	5		T550	4		T703	24
values[9]	445	1			T547	4		T550	7		T703	14
values[10]	346	1			T547	5		T550	8		T703	5
values[11]	367	1			T547	3		T550	7		T703	6
values[12]	318	1			T547	4		T550	10		T703	15
values[13]	301	1			T547	3		T550	8		T703	7
values[14]	315	1			T547	4		T550	3		T703	7
values[15]	275	1			T547	7		T550	3		T703	9
values[16]	336	1			T547	4		T550	17		T703	10
values[17]	317	1			T547	2		T550	4		T703	4
values[18]	327	1			T547	2		T550	3		T703	11
values[19]	289	1			T547	1		T550	6		T703	6
values[20]	282	1			T547	2		T550	16		T703	10
values[21]	288	1			T547	1		T550	3		T703	4
values[22]	283	1			T547	3		T550	3		T703	5
values[23]	253	1			T547	4		T550	4		T703	7
values[24]	302	1			T547	3		T550	5		T703	7
values[25]	267	1			T547	2		T550	4		T703	10
values[26]	277	1			T547	6		T550	27		T703	11
values[27]	295	1			T547	2		T550	7		T703	3
values[28]	264	1			T547	2		T550	5		T703	6
values[29]	251	1			T547	1		T550	9		T703	4
values[30]	241	1			T547	3		T550	8		T703	6
values[31]	258	1			T547	5		T550	6		T703	4
values[32]	275	1			T547	1		T550	11		T703	6
values[33]	277	1			T547	3		T550	5		T703	6
values[34]	270	1			T547	3		T550	3		T703	14
values[35]	245	1			T547	2		T550	7		T703	11
values[36]	276	1			T547	12		T550	9		T703	7
values[37]	269	1			T547	5		T550	8		T703	9
values[38]	244	1			T547	2		T550	12		T703	5
values[39]	213	1			T547	3		T550	4		T703	3
values[40]	224	1			T547	2		T550	11		T703	9
values[41]	225	1			T547	2		T550	11		T703	10
values[42]	250	1			T547	2		T550	7		T484	3
values[43]	214	1			T547	3		T550	6		T484	11
values[44]	262	1			T547	2		T550	9		T456	16
values[45]	212	1			T547	1		T550	6		T456	9
values[46]	220	1			T547	5		T550	3		T456	8
values[47]	209	1			T547	4		T550	3		T456	3
values[48]	239	1			T547	1		T550	4		T456	13
values[49]	251	1			T547	5		T550	10		T456	13
values[50]	229	1			T547	12		T550	6		T456	4
values[51]	223	1			T547	4		T550	5		T456	6
values[52]	188	1			T547	3		T550	6		T456	8
values[53]	202	1			T547	4		T550	4		T456	14
values[54]	215	1			T547	6		T550	3		T456	6
values[55]	217	1			T547	2		T550	7		T456	3
values[56]	180	1			T547	1		T550	3		T456	2
values[57]	182	1			T547	1		T456	5		T855	1
values[58]	190	1			T547	2		T456	12		T855	2
values[59]	169	1			T547	3		T456	11		T855	3
values[60]	184	1			T547	1		T456	13		T855	1
values[61]	176	1			T547	3		T456	3		T855	5
values[62]	166	1			T547	4		T456	12		T855	1
values[63]	156	1			T547	4		T456	7		T855	1
values[64]	147	1			T547	1		T456	10		T855	4
values[65]	142	1			T547	2		T456	4		T855	1
values[66]	122	1			T547	10		T456	5		T855	2
values[67]	118	1			T547	10		T456	7		T855	3
values[68]	94	1			T547	2		T456	6		T855	3
values[69]	118	1			T547	7		T456	12		T855	2
values[70]	111	1			T547	5		T855	1		T856	1
values[71]	93	1			T547	4		T855	4		T856	1
values[72]	115	1			T547	14		T855	1		T856	1
values[73]	102	1			T547	4		T855	2		T856	1
values[74]	99	1			T547	10		T855	5		T856	1
values[75]	68	1			T547	5		T855	2		T856	1
values[76]	56	1			T547	1		T855	1		T856	1
values[77]	70	1			T547	6		T855	3		T856	1
values[78]	71	1			T547	6		T855	3		T856	1
values[79]	75	1			T547	7		T855	7		T856	1
values[80]	82	1			T547	9		T855	11		T856	1
values[81]	84	1			T547	2		T855	5		T856	1
values[82]	64	1			T547	3		T855	10		T856	1
values[83]	82	1			T547	1		T855	10		T856	1
values[84]	68	1			T547	1		T855	5		T856	1
values[85]	75	1			T547	2		T855	4		T856	2
values[86]	66	1			T547	1		T855	2		T856	3
values[87]	84	1			T547	7		T855	1		T856	9
values[88]	97	1			T547	7		T855	6		T856	1
values[89]	84	1			T547	1		T855	4		T856	2
values[90]	68	1			T547	1		T855	5		T856	3
values[91]	89	1			T547	2		T855	12		T856	1
values[92]	111	1			T547	2		T855	2		T856	5
values[93]	85	1			T547	4		T855	3		T856	2
values[94]	85	1			T547	2		T855	2		T856	4
values[95]	66	1			T547	2		T855	5		T856	4
values[96]	86	1			T547	3		T855	6		T856	2
values[97]	110	1			T547	10		T855	6		T856	2
values[98]	90	1			T547	4		T855	5		T856	2
values[99]	80	1			T547	3		T855	4		T856	2
values[100]	70	1			T547	6		T855	5		T856	4
values[101]	58	1			T547	4		T855	4		T856	1
values[102]	80	1			T547	2		T855	9		T856	2
values[103]	77	1			T547	1		T855	12		T856	2
values[104]	63	1			T547	3		T855	8		T856	2
values[105]	82	1			T547	4		T855	18		T856	1
values[106]	73	1			T547	3		T855	9		T856	6
values[107]	75	1			T547	4		T855	5		T856	2
values[108]	72	1			T547	9		T855	5		T856	2
values[109]	70	1			T547	4		T855	4		T856	1
values[110]	65	1			T547	3		T855	4		T856	5
values[111]	66	1			T547	3		T855	3		T856	1
values[112]	77	1			T547	7		T855	6		T856	1
values[113]	79	1			T547	1		T855	4		T856	6
values[114]	59	1			T547	2		T855	1		T856	1
values[115]	70	1			T547	2		T855	2		T856	1
values[116]	82	1			T547	3		T855	1		T856	2
values[117]	79	1			T547	4		T855	4		T856	2
values[118]	71	1			T547	6		T855	1		T856	4
values[119]	91	1			T547	5		T855	3		T856	1
values[120]	78	1			T547	4		T855	4		T856	4
values[121]	58	1			T547	2		T855	4		T856	3
values[122]	77	1			T547	3		T855	10		T856	1
values[123]	84	1			T547	5		T855	7		T856	2
values[124]	65	1			T547	4		T855	3		T856	1
values[125]	69	1			T547	2		T855	5		T856	4
values[126]	99	1			T547	7		T855	7		T856	1
values[127]	879	1			T547	24		T855	14		T856	26
values[128]	7549	1			T547	10		T855	6		T856	253