Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
4091 |
1 |
|
|
T359 |
818 |
|
T55 |
1 |
|
T780 |
511 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
4093 |
1 |
|
|
T359 |
819 |
|
T55 |
1 |
|
T780 |
511 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
4091 |
1 |
|
|
T359 |
818 |
|
T55 |
1 |
|
T780 |
511 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
114899 |
1 |
|
|
T36 |
590 |
|
T86 |
10 |
|
T68 |
588 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
114981 |
1 |
|
|
T36 |
591 |
|
T86 |
10 |
|
T68 |
588 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
114899 |
1 |
|
|
T36 |
590 |
|
T86 |
10 |
|
T68 |
588 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
7785 |
1 |
|
|
T86 |
9 |
|
T316 |
1714 |
|
T73 |
1 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
7788 |
1 |
|
|
T86 |
9 |
|
T316 |
1715 |
|
T73 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
7785 |
1 |
|
|
T86 |
9 |
|
T316 |
1714 |
|
T73 |
1 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
263 |
1 |
|
|
T86 |
10 |
|
T88 |
36 |
|
T89 |
67 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
263 |
1 |
|
|
T86 |
10 |
|
T88 |
36 |
|
T89 |
67 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
263 |
1 |
|
|
T86 |
10 |
|
T88 |
36 |
|
T89 |
67 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
4947 |
1 |
|
|
T86 |
6 |
|
T73 |
1 |
|
T88 |
49 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
4949 |
1 |
|
|
T86 |
6 |
|
T73 |
1 |
|
T88 |
49 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
4947 |
1 |
|
|
T86 |
6 |
|
T73 |
1 |
|
T88 |
49 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
293 |
1 |
|
|
T86 |
15 |
|
T73 |
1 |
|
T88 |
40 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
293 |
1 |
|
|
T86 |
15 |
|
T73 |
1 |
|
T88 |
40 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
293 |
1 |
|
|
T86 |
15 |
|
T73 |
1 |
|
T88 |
40 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
8130 |
1 |
|
|
T86 |
11 |
|
T174 |
308 |
|
T178 |
205 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
8136 |
1 |
|
|
T86 |
11 |
|
T174 |
308 |
|
T178 |
205 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
8130 |
1 |
|
|
T86 |
11 |
|
T174 |
308 |
|
T178 |
205 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
288 |
1 |
|
|
T86 |
7 |
|
T73 |
1 |
|
T88 |
35 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
288 |
1 |
|
|
T86 |
7 |
|
T73 |
1 |
|
T88 |
35 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
288 |
1 |
|
|
T86 |
7 |
|
T73 |
1 |
|
T88 |
35 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
3691 |
1 |
|
|
T86 |
7 |
|
T248 |
1727 |
|
T88 |
36 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
3691 |
1 |
|
|
T86 |
7 |
|
T248 |
1727 |
|
T88 |
36 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
3691 |
1 |
|
|
T86 |
7 |
|
T248 |
1727 |
|
T88 |
36 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
470 |
1 |
|
|
T86 |
8 |
|
T174 |
10 |
|
T124 |
2 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
470 |
1 |
|
|
T86 |
8 |
|
T174 |
10 |
|
T124 |
2 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
470 |
1 |
|
|
T86 |
8 |
|
T174 |
10 |
|
T124 |
2 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
264 |
1 |
|
|
T86 |
10 |
|
T88 |
42 |
|
T89 |
75 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
264 |
1 |
|
|
T86 |
10 |
|
T88 |
42 |
|
T89 |
75 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
264 |
1 |
|
|
T86 |
10 |
|
T88 |
42 |
|
T89 |
75 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
3270 |
1 |
|
|
T305 |
818 |
|
T55 |
1 |
|
T405 |
509 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
3272 |
1 |
|
|
T305 |
819 |
|
T55 |
1 |
|
T405 |
509 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
3270 |
1 |
|
|
T305 |
818 |
|
T55 |
1 |
|
T405 |
509 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
645 |
1 |
|
|
T86 |
9 |
|
T311 |
119 |
|
T88 |
31 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
645 |
1 |
|
|
T86 |
9 |
|
T311 |
119 |
|
T88 |
31 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
645 |
1 |
|
|
T86 |
9 |
|
T311 |
119 |
|
T88 |
31 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
3433 |
1 |
|
|
T86 |
6 |
|
T753 |
1059 |
|
T311 |
118 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
3434 |
1 |
|
|
T86 |
6 |
|
T753 |
1059 |
|
T311 |
118 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
3433 |
1 |
|
|
T86 |
6 |
|
T753 |
1059 |
|
T311 |
118 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
1717 |
1 |
|
|
T36 |
2 |
|
T327 |
2 |
|
T55 |
1 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
1719 |
1 |
|
|
T36 |
2 |
|
T327 |
2 |
|
T55 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
1717 |
1 |
|
|
T36 |
2 |
|
T327 |
2 |
|
T55 |
1 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
919 |
1 |
|
|
T36 |
1 |
|
T327 |
1 |
|
T55 |
1 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
920 |
1 |
|
|
T36 |
1 |
|
T327 |
1 |
|
T55 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
919 |
1 |
|
|
T36 |
1 |
|
T327 |
1 |
|
T55 |
1 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
1921 |
1 |
|
|
T36 |
1 |
|
T327 |
1 |
|
T55 |
1 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
1922 |
1 |
|
|
T36 |
1 |
|
T327 |
1 |
|
T55 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
1921 |
1 |
|
|
T36 |
1 |
|
T327 |
1 |
|
T55 |
1 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
12220 |
1 |
|
|
T86 |
11 |
|
T228 |
1183 |
|
T244 |
1187 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
12222 |
1 |
|
|
T86 |
11 |
|
T228 |
1183 |
|
T244 |
1187 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
12220 |
1 |
|
|
T86 |
11 |
|
T228 |
1183 |
|
T244 |
1187 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
304 |
1 |
|
|
T86 |
8 |
|
T73 |
1 |
|
T88 |
44 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
304 |
1 |
|
|
T86 |
8 |
|
T73 |
1 |
|
T88 |
44 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
304 |
1 |
|
|
T86 |
8 |
|
T73 |
1 |
|
T88 |
44 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
118294 |
1 |
|
|
T36 |
590 |
|
T86 |
12 |
|
T68 |
588 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
118374 |
1 |
|
|
T36 |
591 |
|
T86 |
12 |
|
T68 |
588 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
118294 |
1 |
|
|
T36 |
590 |
|
T86 |
12 |
|
T68 |
588 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
597 |
1 |
|
|
T86 |
7 |
|
T73 |
1 |
|
T311 |
119 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
597 |
1 |
|
|
T86 |
7 |
|
T73 |
1 |
|
T311 |
119 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
597 |
1 |
|
|
T86 |
7 |
|
T73 |
1 |
|
T311 |
119 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
1142 |
1 |
|
|
T23 |
1 |
|
T55 |
1 |
|
T781 |
535 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
1142 |
1 |
|
|
T23 |
1 |
|
T55 |
1 |
|
T781 |
535 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
1142 |
1 |
|
|
T23 |
1 |
|
T55 |
1 |
|
T781 |
535 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
1808 |
1 |
|
|
T55 |
1 |
|
T175 |
574 |
|
T176 |
575 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
1810 |
1 |
|
|
T55 |
1 |
|
T175 |
574 |
|
T176 |
576 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
1808 |
1 |
|
|
T55 |
1 |
|
T175 |
574 |
|
T176 |
575 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
1929 |
1 |
|
|
T55 |
1 |
|
T768 |
514 |
|
T769 |
813 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
1930 |
1 |
|
|
T55 |
1 |
|
T768 |
514 |
|
T769 |
814 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
1929 |
1 |
|
|
T55 |
1 |
|
T768 |
514 |
|
T769 |
813 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
2538 |
1 |
|
|
T55 |
1 |
|
T168 |
818 |
|
T782 |
818 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
2539 |
1 |
|
|
T55 |
1 |
|
T168 |
819 |
|
T782 |
818 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
2538 |
1 |
|
|
T55 |
1 |
|
T168 |
818 |
|
T782 |
818 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
1391301 |
1 |
|
|
T36 |
590 |
|
T86 |
9 |
|
T68 |
588 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
1391390 |
1 |
|
|
T36 |
591 |
|
T86 |
9 |
|
T68 |
588 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
1391301 |
1 |
|
|
T36 |
590 |
|
T86 |
9 |
|
T68 |
588 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
639 |
1 |
|
|
T86 |
9 |
|
T231 |
1 |
|
T311 |
107 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
639 |
1 |
|
|
T86 |
9 |
|
T231 |
1 |
|
T311 |
107 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
639 |
1 |
|
|
T86 |
9 |
|
T231 |
1 |
|
T311 |
107 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
1418 |
1 |
|
|
T36 |
1 |
|
T162 |
500 |
|
T23 |
1 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
1419 |
1 |
|
|
T36 |
1 |
|
T162 |
500 |
|
T23 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
1418 |
1 |
|
|
T36 |
1 |
|
T162 |
500 |
|
T23 |
1 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
51944 |
1 |
|
|
T36 |
280 |
|
T68 |
277 |
|
T69 |
281 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
52051 |
1 |
|
|
T36 |
280 |
|
T68 |
278 |
|
T69 |
282 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
51944 |
1 |
|
|
T36 |
280 |
|
T68 |
277 |
|
T69 |
281 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
902 |
1 |
|
|
T23 |
1 |
|
T55 |
1 |
|
T168 |
818 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
903 |
1 |
|
|
T23 |
1 |
|
T55 |
1 |
|
T168 |
819 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
902 |
1 |
|
|
T23 |
1 |
|
T55 |
1 |
|
T168 |
818 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
5170 |
1 |
|
|
T163 |
805 |
|
T164 |
817 |
|
T783 |
509 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
5175 |
1 |
|
|
T163 |
806 |
|
T164 |
818 |
|
T783 |
509 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
5170 |
1 |
|
|
T163 |
805 |
|
T164 |
817 |
|
T783 |
509 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
87 |
1 |
|
|
T23 |
1 |
|
T55 |
1 |
|
T56 |
1 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
87 |
1 |
|
|
T23 |
1 |
|
T55 |
1 |
|
T56 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
87 |
1 |
|
|
T23 |
1 |
|
T55 |
1 |
|
T56 |
1 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
7541 |
1 |
|
|
T68 |
812 |
|
T329 |
517 |
|
T224 |
814 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
7546 |
1 |
|
|
T68 |
812 |
|
T329 |
517 |
|
T224 |
815 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
7541 |
1 |
|
|
T68 |
812 |
|
T329 |
517 |
|
T224 |
814 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
4311 |
1 |
|
|
T87 |
521 |
|
T91 |
515 |
|
T55 |
1 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
4313 |
1 |
|
|
T87 |
521 |
|
T91 |
515 |
|
T55 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
4311 |
1 |
|
|
T87 |
521 |
|
T91 |
515 |
|
T55 |
1 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
4085 |
1 |
|
|
T55 |
1 |
|
T784 |
525 |
|
T393 |
495 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
4085 |
1 |
|
|
T55 |
1 |
|
T784 |
525 |
|
T393 |
495 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
4085 |
1 |
|
|
T55 |
1 |
|
T784 |
525 |
|
T393 |
495 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
627 |
1 |
|
|
T55 |
1 |
|
T772 |
536 |
|
T56 |
1 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
628 |
1 |
|
|
T89 |
1 |
|
T55 |
1 |
|
T772 |
536 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
627 |
1 |
|
|
T55 |
1 |
|
T772 |
536 |
|
T56 |
1 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
9017 |
1 |
|
|
T129 |
493 |
|
T258 |
1 |
|
T367 |
964 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
9041 |
1 |
|
|
T129 |
495 |
|
T258 |
1 |
|
T367 |
968 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
9017 |
1 |
|
|
T129 |
493 |
|
T258 |
1 |
|
T367 |
964 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
3694 |
1 |
|
|
T86 |
6 |
|
T88 |
37 |
|
T89 |
85 |
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| alert_triggered |
3694 |
1 |
|
|
T86 |
6 |
|
T88 |
37 |
|
T89 |
85 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
alert_triggered |
3694 |
1 |
|
|
T86 |
6 |
|
T88 |
37 |
|
T89 |
85 |
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| complete |
2529 |
1 |
|
|
T751 |
811 |
|
T55 |
1 |
|
T785 |
813 |