Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__prim_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	176862	1			T81	97		T82	389		T85	90
values[2]	4699	1			T81	13		T82	5		T85	6
values[3]	2419	1			T81	21		T455	54		T724	5
values[4]	1873	1			T81	51		T455	17		T724	5
values[5]	1593	1			T81	81		T455	32		T724	3
values[6]	1338	1			T81	55		T455	40		T724	3
values[7]	1284	1			T81	66		T455	16		T724	1
values[8]	1219	1			T81	78		T455	3		T724	3
values[9]	959	1			T81	73		T724	3		T714	7
values[10]	763	1			T81	39		T724	3		T714	4
values[11]	672	1			T81	46		T724	3		T714	5
values[12]	674	1			T81	24		T724	1		T714	1
values[13]	618	1			T81	6		T724	1		T684	7
values[14]	667	1			T724	3		T684	2		T878	34
values[15]	575	1			T724	3		T878	13		T501	8
values[16]	516	1			T724	4		T878	19		T501	8
values[17]	441	1			T724	3		T878	29		T501	1
values[18]	451	1			T724	1		T878	17		T544	7
values[19]	476	1			T724	1		T878	43		T544	6
values[20]	442	1			T724	2		T878	57		T544	2
values[21]	334	1			T724	1		T878	70		T544	7
values[22]	311	1			T724	3		T878	71		T544	9
values[23]	308	1			T724	1		T878	51		T544	16
values[24]	252	1			T724	1		T878	37		T544	12
values[25]	209	1			T724	1		T878	24		T544	10
values[26]	201	1			T724	1		T878	26		T544	1
values[27]	244	1			T724	3		T878	24		T486	3
values[28]	201	1			T724	3		T878	10		T486	3
values[29]	198	1			T724	7		T878	2		T486	6
values[30]	199	1			T724	3		T486	7		T879	7
values[31]	181	1			T724	5		T486	4		T879	6
values[32]	161	1			T724	3		T486	7		T493	1
values[33]	140	1			T724	5		T486	3		T493	1
values[34]	136	1			T724	4		T486	1		T493	1
values[35]	146	1			T724	6		T486	1		T493	1
values[36]	137	1			T724	2		T486	3		T493	1
values[37]	153	1			T724	2		T486	1		T493	1
values[38]	131	1			T724	3		T486	1		T493	1
values[39]	167	1			T724	1		T486	1		T493	1
values[40]	212	1			T724	5		T486	4		T493	1
values[41]	161	1			T724	6		T486	7		T493	1
values[42]	125	1			T724	5		T486	5		T493	1
values[43]	90	1			T724	5		T486	6		T493	1
values[44]	79	1			T724	4		T486	4		T493	1
values[45]	65	1			T724	3		T486	4		T493	1
values[46]	57	1			T724	1		T486	1		T493	1
values[47]	51	1			T724	1		T486	2		T493	1
values[48]	59	1			T724	2		T486	1		T493	1
values[49]	63	1			T724	1		T486	3		T493	1
values[50]	55	1			T724	3		T486	2		T493	1
values[51]	63	1			T724	5		T486	4		T493	1
values[52]	64	1			T724	5		T486	5		T493	1
values[53]	70	1			T724	2		T486	1		T493	1
values[54]	77	1			T724	6		T486	2		T493	1
values[55]	70	1			T724	3		T486	1		T493	1
values[56]	82	1			T724	3		T486	3		T493	1
values[57]	69	1			T724	1		T486	1		T493	1
values[58]	56	1			T724	1		T486	2		T493	1
values[59]	65	1			T724	3		T486	1		T493	1
values[60]	72	1			T724	4		T486	2		T493	1
values[61]	60	1			T724	2		T486	2		T493	1
values[62]	61	1			T724	1		T486	1		T493	1
values[63]	68	1			T724	3		T486	2		T493	1
values[64]	60	1			T724	3		T486	2		T493	1
values[65]	65	1			T724	1		T486	2		T493	1
values[66]	77	1			T724	3		T486	6		T493	1
values[67]	69	1			T724	3		T486	2		T493	1
values[68]	54	1			T724	2		T486	1		T493	1
values[69]	60	1			T724	2		T486	4		T493	1
values[70]	67	1			T724	4		T486	2		T493	1
values[71]	61	1			T724	1		T486	3		T493	1
values[72]	65	1			T724	3		T486	4		T493	1
values[73]	57	1			T724	1		T486	1		T493	1
values[74]	68	1			T724	1		T486	1		T493	1
values[75]	85	1			T724	5		T486	5		T493	1
values[76]	73	1			T724	2		T486	1		T493	1
values[77]	65	1			T724	3		T486	2		T493	1
values[78]	66	1			T724	1		T486	1		T493	1
values[79]	60	1			T724	4		T486	2		T493	1
values[80]	63	1			T724	2		T486	2		T493	1
values[81]	66	1			T724	3		T486	1		T493	1
values[82]	78	1			T724	4		T486	1		T493	1
values[83]	64	1			T724	1		T486	5		T493	1
values[84]	72	1			T724	4		T486	9		T493	1
values[85]	71	1			T724	2		T486	2		T493	1
values[86]	80	1			T724	5		T486	4		T493	1
values[87]	78	1			T724	3		T486	3		T493	1
values[88]	74	1			T724	1		T486	2		T493	1
values[89]	73	1			T724	5		T486	2		T493	1
values[90]	57	1			T724	2		T486	3		T493	1
values[91]	83	1			T724	3		T486	5		T493	1
values[92]	91	1			T724	12		T486	1		T493	1
values[93]	79	1			T724	4		T486	1		T493	1
values[94]	72	1			T724	4		T486	3		T493	1
values[95]	88	1			T724	7		T486	3		T493	1
values[96]	97	1			T724	7		T486	5		T493	1
values[97]	89	1			T724	5		T486	5		T493	2
values[98]	95	1			T724	9		T486	2		T493	5
values[99]	90	1			T724	2		T486	5		T493	2
values[100]	94	1			T724	2		T486	1		T493	2
values[101]	85	1			T724	2		T486	3		T493	2
values[102]	85	1			T724	4		T486	1		T493	1
values[103]	104	1			T724	11		T486	2		T493	1
values[104]	98	1			T724	3		T486	3		T493	2
values[105]	115	1			T724	5		T486	1		T493	4
values[106]	118	1			T724	4		T486	6		T493	1
values[107]	126	1			T724	5		T486	7		T493	1
values[108]	125	1			T724	10		T486	8		T493	2
values[109]	119	1			T724	11		T486	6		T493	6
values[110]	130	1			T724	16		T486	2		T493	11
values[111]	96	1			T724	4		T486	1		T493	1
values[112]	87	1			T724	6		T486	2		T493	1
values[113]	103	1			T724	7		T486	2		T493	1
values[114]	101	1			T724	6		T486	4		T493	1
values[115]	102	1			T724	5		T486	5		T493	4
values[116]	129	1			T724	4		T486	5		T493	1
values[117]	124	1			T724	6		T486	4		T493	1
values[118]	98	1			T724	4		T486	4		T493	2
values[119]	109	1			T724	4		T486	5		T493	2
values[120]	124	1			T724	5		T486	10		T493	3
values[121]	117	1			T724	9		T486	2		T493	5
values[122]	102	1			T724	4		T486	9		T493	2
values[123]	139	1			T724	3		T486	11		T493	1
values[124]	259	1			T724	5		T486	8		T493	1
values[125]	516	1			T724	12		T486	38		T493	2
values[126]	952	1			T724	2		T486	52		T493	19
values[127]	2284	1			T486	21		T493	140		T880	7
values[128]	3425	1			T486	2		T493	230		T487	2