Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	147987	1			T81	93		T82	398		T85	107
values[2]	9918	1			T82	9		T85	7		T461	163
values[3]	3751	1			T461	105		T494	102		T455	63
values[4]	2389	1			T461	65		T494	62		T455	30
values[5]	1448	1			T461	29		T494	13		T455	25
values[6]	1112	1			T461	10		T455	24		T422	6
values[7]	808	1			T461	8		T455	5		T422	7
values[8]	662	1			T461	2		T455	1		T422	3
values[9]	565	1			T422	7		T684	4		T883	4
values[10]	560	1			T422	10		T684	7		T883	4
values[11]	487	1			T422	8		T684	1		T883	5
values[12]	517	1			T422	10		T684	4		T883	14
values[13]	517	1			T422	3		T684	1		T883	12
values[14]	498	1			T422	5		T684	2		T883	13
values[15]	381	1			T422	2		T883	8		T479	2
values[16]	407	1			T422	4		T883	8		T479	4
values[17]	406	1			T422	7		T883	3		T479	11
values[18]	358	1			T422	9		T883	6		T575	25
values[19]	375	1			T422	8		T883	5		T575	21
values[20]	346	1			T422	11		T883	13		T575	15
values[21]	384	1			T422	15		T883	15		T575	12
values[22]	401	1			T422	13		T883	7		T575	14
values[23]	356	1			T422	6		T883	9		T575	14
values[24]	362	1			T422	8		T883	3		T575	19
values[25]	361	1			T422	12		T575	16		T862	6
values[26]	363	1			T422	12		T575	15		T862	5
values[27]	325	1			T422	6		T575	12		T862	3
values[28]	341	1			T422	6		T575	9		T862	12
values[29]	377	1			T422	7		T575	14		T862	7
values[30]	329	1			T422	4		T575	9		T862	3
values[31]	292	1			T422	13		T575	7		T862	5
values[32]	305	1			T422	4		T575	7		T862	5
values[33]	333	1			T422	3		T575	16		T862	5
values[34]	350	1			T422	7		T575	9		T862	3
values[35]	326	1			T422	9		T575	11		T862	9
values[36]	380	1			T422	13		T575	11		T862	7
values[37]	381	1			T422	8		T575	9		T862	15
values[38]	363	1			T422	6		T575	11		T862	15
values[39]	319	1			T422	7		T575	14		T862	5
values[40]	343	1			T422	6		T575	15		T862	3
values[41]	339	1			T422	6		T575	35		T862	3
values[42]	293	1			T422	7		T575	9		T862	5
values[43]	304	1			T422	10		T575	20		T862	10
values[44]	339	1			T422	12		T575	23		T862	5
values[45]	347	1			T422	13		T575	40		T862	2
values[46]	354	1			T422	7		T575	35		T862	5
values[47]	315	1			T422	9		T575	13		T862	6
values[48]	348	1			T422	9		T575	17		T862	10
values[49]	325	1			T422	10		T575	19		T862	8
values[50]	273	1			T422	5		T575	18		T862	8
values[51]	306	1			T422	2		T575	17		T862	9
values[52]	307	1			T422	8		T575	13		T862	20
values[53]	255	1			T422	5		T575	11		T862	8
values[54]	300	1			T422	3		T575	13		T862	9
values[55]	268	1			T422	14		T575	12		T862	8
values[56]	305	1			T422	15		T575	10		T862	9
values[57]	283	1			T422	8		T575	14		T862	9
values[58]	243	1			T422	6		T575	10		T862	7
values[59]	271	1			T422	5		T575	17		T862	6
values[60]	258	1			T422	3		T575	16		T862	7
values[61]	239	1			T422	4		T575	12		T865	2
values[62]	240	1			T422	6		T575	12		T865	2
values[63]	198	1			T422	5		T575	11		T865	2
values[64]	244	1			T422	10		T575	11		T865	2
values[65]	193	1			T422	14		T575	7		T865	2
values[66]	243	1			T422	26		T575	13		T865	2
values[67]	249	1			T422	16		T575	6		T865	2
values[68]	205	1			T422	8		T865	2		T501	4
values[69]	159	1			T422	8		T865	2		T501	3
values[70]	184	1			T422	22		T865	2		T501	1
values[71]	148	1			T422	21		T865	2		T501	3
values[72]	138	1			T422	22		T865	2		T501	1
values[73]	145	1			T422	7		T865	2		T501	3
values[74]	126	1			T422	9		T865	2		T501	3
values[75]	119	1			T422	14		T865	2		T501	1
values[76]	112	1			T422	3		T865	3		T501	2
values[77]	100	1			T422	2		T865	8		T501	1
values[78]	103	1			T422	5		T865	19		T501	1
values[79]	102	1			T422	1		T865	7		T501	1
values[80]	112	1			T422	2		T865	13		T501	2
values[81]	123	1			T422	3		T865	4		T501	1
values[82]	105	1			T422	4		T865	3		T501	2
values[83]	86	1			T422	1		T865	3		T501	6
values[84]	92	1			T422	2		T865	6		T501	7
values[85]	95	1			T422	4		T865	2		T501	1
values[86]	113	1			T422	5		T865	13		T501	1
values[87]	100	1			T422	2		T865	4		T501	1
values[88]	124	1			T422	3		T865	3		T501	2
values[89]	99	1			T422	1		T865	2		T501	10
values[90]	78	1			T422	2		T865	7		T501	7
values[91]	60	1			T422	1		T865	3		T501	4
values[92]	74	1			T422	2		T865	7		T501	3
values[93]	82	1			T422	1		T865	2		T501	6
values[94]	94	1			T422	5		T865	5		T501	2
values[95]	92	1			T422	12		T865	6		T501	3
values[96]	87	1			T422	8		T865	7		T501	7
values[97]	73	1			T422	7		T865	5		T501	7
values[98]	79	1			T422	13		T865	4		T501	4
values[99]	81	1			T422	3		T865	5		T501	2
values[100]	81	1			T422	2		T865	7		T501	1
values[101]	77	1			T422	1		T865	5		T501	2
values[102]	71	1			T422	1		T865	6		T501	4
values[103]	66	1			T422	3		T865	6		T501	2
values[104]	64	1			T422	2		T865	5		T501	1
values[105]	75	1			T422	3		T865	5		T501	2
values[106]	69	1			T422	3		T865	6		T501	4
values[107]	56	1			T422	4		T865	3		T501	1
values[108]	68	1			T422	6		T865	4		T501	6
values[109]	70	1			T422	10		T865	8		T501	4
values[110]	63	1			T422	6		T865	2		T501	7
values[111]	69	1			T422	4		T865	6		T501	3
values[112]	95	1			T422	8		T865	2		T501	3
values[113]	55	1			T422	1		T865	2		T501	3
values[114]	61	1			T422	1		T865	3		T501	3
values[115]	66	1			T422	5		T865	4		T501	2
values[116]	70	1			T422	8		T865	4		T501	1
values[117]	69	1			T422	6		T865	4		T501	3
values[118]	60	1			T422	2		T865	3		T501	1
values[119]	73	1			T422	4		T865	4		T501	7
values[120]	77	1			T422	2		T865	3		T501	8
values[121]	91	1			T422	4		T865	2		T501	14
values[122]	66	1			T422	1		T865	2		T501	7
values[123]	73	1			T422	1		T865	8		T501	2
values[124]	65	1			T422	4		T865	2		T501	8
values[125]	82	1			T422	6		T865	2		T501	6
values[126]	190	1			T422	31		T865	2		T501	30
values[127]	898	1			T422	56		T865	55		T501	63
values[128]	7071	1			T422	32		T865	555		T501	31