Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
6361 |
1 |
|
|
T90 |
69 |
|
T221 |
1098 |
|
T213 |
110 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
6364 |
1 |
|
|
T90 |
69 |
|
T221 |
1099 |
|
T213 |
110 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
6361 |
1 |
|
|
T90 |
69 |
|
T221 |
1098 |
|
T213 |
110 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
7153 |
1 |
|
|
T90 |
60 |
|
T174 |
1728 |
|
T222 |
1716 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
7154 |
1 |
|
|
T90 |
60 |
|
T174 |
1728 |
|
T222 |
1716 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
7153 |
1 |
|
|
T90 |
60 |
|
T174 |
1728 |
|
T222 |
1716 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
106 |
1 |
|
|
T66 |
1 |
|
T67 |
1 |
|
T68 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
111 |
1 |
|
|
T90 |
1 |
|
T93 |
1 |
|
T160 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
106 |
1 |
|
|
T66 |
1 |
|
T67 |
1 |
|
T68 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
2761 |
1 |
|
|
T663 |
817 |
|
T686 |
812 |
|
T66 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
2765 |
1 |
|
|
T90 |
1 |
|
T663 |
818 |
|
T686 |
813 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
2761 |
1 |
|
|
T663 |
817 |
|
T686 |
812 |
|
T66 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
6565 |
1 |
|
|
T90 |
65 |
|
T611 |
1181 |
|
T92 |
6 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
6565 |
1 |
|
|
T90 |
65 |
|
T611 |
1181 |
|
T92 |
6 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
6565 |
1 |
|
|
T90 |
65 |
|
T611 |
1181 |
|
T92 |
6 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
3780 |
1 |
|
|
T161 |
2 |
|
T713 |
503 |
|
T714 |
530 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
3781 |
1 |
|
|
T161 |
2 |
|
T713 |
503 |
|
T714 |
530 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
3780 |
1 |
|
|
T161 |
2 |
|
T713 |
503 |
|
T714 |
530 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
3854 |
1 |
|
|
T300 |
816 |
|
T715 |
809 |
|
T161 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
3857 |
1 |
|
|
T300 |
817 |
|
T715 |
810 |
|
T161 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
3854 |
1 |
|
|
T300 |
816 |
|
T715 |
809 |
|
T161 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
2767 |
1 |
|
|
T666 |
814 |
|
T161 |
1 |
|
T716 |
529 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
2769 |
1 |
|
|
T666 |
815 |
|
T161 |
1 |
|
T716 |
529 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
2767 |
1 |
|
|
T666 |
814 |
|
T161 |
1 |
|
T716 |
529 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
2218 |
1 |
|
|
T667 |
508 |
|
T688 |
812 |
|
T161 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
2219 |
1 |
|
|
T667 |
508 |
|
T688 |
813 |
|
T161 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
2218 |
1 |
|
|
T667 |
508 |
|
T688 |
812 |
|
T161 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
2195 |
1 |
|
|
T90 |
75 |
|
T367 |
686 |
|
T213 |
101 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
2195 |
1 |
|
|
T90 |
75 |
|
T367 |
686 |
|
T213 |
101 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
2195 |
1 |
|
|
T90 |
75 |
|
T367 |
686 |
|
T213 |
101 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
263 |
1 |
|
|
T90 |
69 |
|
T609 |
1 |
|
T92 |
2 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
263 |
1 |
|
|
T90 |
69 |
|
T609 |
1 |
|
T92 |
2 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
263 |
1 |
|
|
T90 |
69 |
|
T609 |
1 |
|
T92 |
2 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
7607 |
1 |
|
|
T90 |
66 |
|
T267 |
1733 |
|
T92 |
1 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
7607 |
1 |
|
|
T90 |
66 |
|
T267 |
1733 |
|
T92 |
1 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
7607 |
1 |
|
|
T90 |
66 |
|
T267 |
1733 |
|
T92 |
1 |
Summary for Variable cp_handshake_complete
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_handshake_complete
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
251 |
1 |
|
|
T90 |
54 |
|
T609 |
1 |
|
T92 |
7 |
Summary for Variable cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_trans_type
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
alert_triggered |
251 |
1 |
|
|
T90 |
54 |
|
T609 |
1 |
|
T92 |
7 |
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
1 |
0 |
1 |
100.00 |
|
Automatically Generated Cross Bins for alert_handshake_complete
Bins
cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
complete |
alert_triggered |
251 |
1 |
|
|
T90 |
54 |
|
T609 |
1 |
|
T92 |
7 |