Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__prim_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	153164	1			T80	5		T81	191		T82	7
values[2]	4153	1			T515	115		T422	1		T429	108
values[3]	2063	1			T515	42		T429	54		T547	1
values[4]	1503	1			T515	16		T429	37		T502	46
values[5]	1209	1			T515	3		T429	16		T502	29
values[6]	931	1			T429	7		T502	32		T584	3
values[7]	747	1			T429	4		T502	31		T584	4
values[8]	652	1			T429	10		T502	55		T584	4
values[9]	544	1			T429	11		T502	39		T584	3
values[10]	432	1			T429	3		T502	28		T584	2
values[11]	459	1			T502	11		T584	5		T775	2
values[12]	512	1			T502	12		T584	3		T775	1
values[13]	449	1			T502	9		T584	2		T775	3
values[14]	365	1			T502	2		T584	2		T775	1
values[15]	346	1			T584	1		T775	2		T620	1
values[16]	351	1			T584	4		T775	3		T620	5
values[17]	361	1			T584	2		T775	1		T620	9
values[18]	290	1			T584	2		T775	1		T620	9
values[19]	250	1			T584	1		T775	3		T620	4
values[20]	222	1			T584	4		T775	2		T620	9
values[21]	284	1			T584	1		T775	3		T620	31
values[22]	334	1			T584	2		T775	3		T620	39
values[23]	296	1			T584	2		T775	6		T620	28
values[24]	244	1			T584	1		T775	5		T620	29
values[25]	294	1			T584	2		T775	4		T620	46
values[26]	290	1			T584	2		T775	4		T620	48
values[27]	268	1			T584	2		T775	6		T620	26
values[28]	247	1			T584	1		T775	6		T620	24
values[29]	249	1			T584	1		T775	2		T620	23
values[30]	242	1			T584	2		T775	1		T620	17
values[31]	206	1			T584	1		T775	5		T620	19
values[32]	196	1			T584	2		T775	2		T620	10
values[33]	184	1			T584	3		T775	1		T620	8
values[34]	176	1			T584	1		T775	2		T620	4
values[35]	197	1			T584	2		T775	2		T794	2
values[36]	151	1			T584	3		T775	2		T794	2
values[37]	132	1			T584	2		T775	3		T794	6
values[38]	119	1			T584	3		T775	1		T794	3
values[39]	119	1			T584	4		T775	1		T794	3
values[40]	128	1			T584	2		T775	1		T794	2
values[41]	132	1			T584	1		T775	1		T794	4
values[42]	121	1			T584	2		T775	3		T794	6
values[43]	104	1			T584	1		T775	2		T794	4
values[44]	112	1			T584	2		T775	2		T794	5
values[45]	88	1			T584	2		T775	3		T794	1
values[46]	77	1			T775	1		T794	2		T795	1
values[47]	71	1			T775	4		T794	3		T795	1
values[48]	74	1			T775	5		T794	5		T795	1
values[49]	70	1			T775	6		T794	2		T795	1
values[50]	63	1			T775	5		T794	2		T795	1
values[51]	51	1			T775	1		T794	1		T795	1
values[52]	52	1			T775	2		T794	2		T795	1
values[53]	58	1			T775	1		T794	1		T795	1
values[54]	53	1			T775	2		T794	2		T795	1
values[55]	66	1			T775	2		T794	2		T795	1
values[56]	62	1			T775	2		T794	6		T795	1
values[57]	54	1			T775	1		T794	7		T795	1
values[58]	63	1			T775	2		T794	6		T795	1
values[59]	53	1			T775	3		T794	4		T795	1
values[60]	57	1			T775	4		T794	5		T795	1
values[61]	50	1			T775	1		T794	2		T795	1
values[62]	69	1			T775	3		T794	3		T795	1
values[63]	60	1			T775	2		T794	1		T795	1
values[64]	53	1			T775	1		T794	2		T795	1
values[65]	60	1			T775	2		T794	4		T795	2
values[66]	74	1			T775	2		T794	5		T795	1
values[67]	63	1			T775	1		T794	8		T795	1
values[68]	54	1			T775	4		T794	2		T795	1
values[69]	60	1			T775	3		T794	2		T795	1
values[70]	68	1			T775	5		T794	2		T795	1
values[71]	62	1			T775	4		T794	2		T795	1
values[72]	68	1			T775	2		T794	2		T795	1
values[73]	70	1			T775	1		T794	3		T795	1
values[74]	67	1			T775	1		T794	1		T795	1
values[75]	63	1			T775	1		T794	1		T795	1
values[76]	68	1			T775	1		T794	1		T795	1
values[77]	77	1			T775	1		T794	3		T795	1
values[78]	84	1			T775	3		T794	2		T795	1
values[79]	81	1			T775	2		T794	1		T795	1
values[80]	73	1			T775	2		T794	2		T795	1
values[81]	78	1			T775	2		T794	1		T795	1
values[82]	81	1			T775	2		T794	2		T795	1
values[83]	85	1			T775	2		T794	3		T795	1
values[84]	93	1			T775	2		T794	3		T795	1
values[85]	90	1			T775	5		T794	4		T795	1
values[86]	90	1			T775	1		T794	4		T795	1
values[87]	84	1			T775	1		T794	3		T795	1
values[88]	100	1			T775	5		T794	2		T795	1
values[89]	92	1			T775	3		T794	5		T795	1
values[90]	103	1			T775	2		T794	7		T795	1
values[91]	93	1			T775	1		T794	7		T795	1
values[92]	91	1			T775	1		T794	7		T795	1
values[93]	80	1			T775	1		T794	5		T795	1
values[94]	81	1			T775	1		T794	6		T795	1
values[95]	82	1			T775	3		T794	10		T795	2
values[96]	99	1			T775	2		T794	8		T795	5
values[97]	90	1			T775	2		T794	4		T795	6
values[98]	82	1			T775	3		T794	5		T795	1
values[99]	91	1			T775	4		T794	5		T795	5
values[100]	97	1			T775	3		T794	4		T795	5
values[101]	85	1			T775	3		T794	4		T795	1
values[102]	112	1			T775	5		T794	2		T795	2
values[103]	90	1			T775	2		T794	3		T795	4
values[104]	85	1			T775	3		T794	3		T795	1
values[105]	101	1			T775	1		T794	5		T795	2
values[106]	107	1			T775	2		T794	4		T795	1
values[107]	110	1			T775	4		T794	8		T795	2
values[108]	90	1			T775	3		T794	2		T795	1
values[109]	88	1			T775	2		T794	1		T795	1
values[110]	110	1			T775	2		T794	2		T795	1
values[111]	91	1			T775	2		T794	2		T795	4
values[112]	94	1			T775	3		T794	6		T795	1
values[113]	86	1			T775	1		T794	2		T795	1
values[114]	90	1			T775	2		T794	4		T795	1
values[115]	100	1			T775	2		T794	8		T795	2
values[116]	130	1			T775	3		T794	3		T795	1
values[117]	110	1			T775	3		T794	1		T795	5
values[118]	118	1			T775	15		T794	2		T795	2
values[119]	102	1			T775	5		T794	3		T795	1
values[120]	84	1			T775	1		T794	2		T795	1
values[121]	95	1			T775	4		T794	5		T795	1
values[122]	116	1			T775	5		T794	1		T795	1
values[123]	141	1			T775	4		T794	7		T795	1
values[124]	239	1			T775	18		T794	25		T795	2
values[125]	436	1			T775	73		T794	27		T795	3
values[126]	870	1			T775	101		T794	44		T795	21
values[127]	2962	1			T775	42		T794	22		T795	112
values[128]	5062	1			T775	1		T794	1		T795	236