Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_device_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138665	1			T80	4		T81	218		T82	6
values[2]	9252	1			T81	4		T88	3		T511	6
values[3]	3463	1			T511	7		T515	12		T429	33
values[4]	1870	1			T511	4		T515	7		T429	23
values[5]	1138	1			T511	18		T515	4		T429	15
values[6]	784	1			T511	4		T515	12		T429	13
values[7]	497	1			T511	8		T515	8		T429	10
values[8]	407	1			T511	4		T515	14		T429	10
values[9]	311	1			T511	3		T515	20		T429	6
values[10]	254	1			T511	6		T515	17		T429	14
values[11]	274	1			T511	6		T515	5		T429	13
values[12]	252	1			T511	7		T515	11		T429	5
values[13]	255	1			T511	9		T515	9		T429	3
values[14]	255	1			T511	15		T515	6		T429	2
values[15]	216	1			T511	5		T515	5		T429	3
values[16]	247	1			T511	12		T515	6		T429	1
values[17]	249	1			T511	10		T515	8		T429	3
values[18]	240	1			T511	3		T515	11		T429	6
values[19]	256	1			T511	4		T515	15		T429	4
values[20]	200	1			T511	4		T515	2		T429	1
values[21]	205	1			T511	4		T515	3		T429	2
values[22]	194	1			T511	6		T515	1		T429	1
values[23]	233	1			T511	14		T515	3		T429	2
values[24]	220	1			T511	8		T515	3		T429	3
values[25]	233	1			T511	5		T515	1		T429	4
values[26]	188	1			T511	10		T515	4		T429	5
values[27]	211	1			T511	11		T515	4		T429	5
values[28]	175	1			T511	11		T429	3		T484	9
values[29]	178	1			T511	6		T429	5		T484	4
values[30]	166	1			T511	4		T429	2		T484	5
values[31]	180	1			T511	4		T429	1		T484	8
values[32]	192	1			T511	14		T429	2		T484	6
values[33]	146	1			T511	4		T429	3		T484	5
values[34]	215	1			T511	6		T429	10		T484	4
values[35]	181	1			T511	6		T429	5		T484	6
values[36]	199	1			T511	15		T429	3		T484	3
values[37]	180	1			T511	6		T429	3		T484	4
values[38]	211	1			T511	6		T429	1		T484	4
values[39]	203	1			T511	9		T429	1		T484	7
values[40]	207	1			T511	10		T429	1		T484	12
values[41]	200	1			T511	3		T429	2		T484	23
values[42]	196	1			T511	4		T429	1		T484	6
values[43]	169	1			T511	8		T429	1		T771	1
values[44]	145	1			T511	9		T429	1		T771	1
values[45]	156	1			T511	3		T429	3		T771	1
values[46]	141	1			T511	5		T429	2		T771	1
values[47]	175	1			T511	4		T429	1		T771	1
values[48]	152	1			T511	14		T429	1		T771	1
values[49]	153	1			T511	11		T429	2		T771	1
values[50]	181	1			T511	4		T429	7		T771	1
values[51]	137	1			T511	7		T429	3		T771	1
values[52]	134	1			T511	13		T429	2		T771	1
values[53]	140	1			T511	13		T429	2		T771	1
values[54]	141	1			T511	3		T429	5		T771	1
values[55]	147	1			T511	7		T429	6		T771	1
values[56]	179	1			T511	5		T429	10		T771	1
values[57]	155	1			T511	9		T429	10		T771	1
values[58]	178	1			T511	5		T429	9		T771	1
values[59]	183	1			T511	11		T429	2		T771	1
values[60]	166	1			T511	5		T429	2		T771	1
values[61]	143	1			T511	11		T429	4		T771	1
values[62]	161	1			T511	19		T429	3		T771	1
values[63]	120	1			T511	8		T429	3		T771	1
values[64]	110	1			T511	3		T429	3		T771	1
values[65]	108	1			T511	4		T429	4		T771	1
values[66]	95	1			T511	8		T429	4		T771	1
values[67]	154	1			T511	1		T429	3		T771	1
values[68]	90	1			T429	2		T771	1		T792	3
values[69]	86	1			T429	7		T771	1		T792	7
values[70]	92	1			T429	3		T771	2		T792	6
values[71]	100	1			T771	1		T792	5		T558	3
values[72]	104	1			T771	1		T792	2		T558	3
values[73]	95	1			T771	1		T792	9		T558	2
values[74]	99	1			T771	1		T792	16		T558	4
values[75]	98	1			T771	1		T792	4		T558	1
values[76]	85	1			T771	1		T792	7		T558	1
values[77]	105	1			T771	1		T792	16		T558	2
values[78]	99	1			T771	1		T792	14		T558	3
values[79]	134	1			T771	1		T792	17		T558	1
values[80]	119	1			T771	1		T792	13		T558	1
values[81]	133	1			T771	2		T792	26		T558	2
values[82]	126	1			T771	6		T792	12		T558	4
values[83]	111	1			T771	4		T792	11		T558	10
values[84]	137	1			T771	4		T792	10		T558	7
values[85]	114	1			T771	2		T792	10		T558	3
values[86]	111	1			T771	3		T792	13		T558	3
values[87]	111	1			T771	2		T792	3		T558	9
values[88]	115	1			T771	6		T792	5		T558	13
values[89]	121	1			T771	1		T792	14		T558	11
values[90]	112	1			T771	1		T792	14		T558	4
values[91]	80	1			T771	3		T792	9		T558	3
values[92]	94	1			T771	5		T792	6		T558	1
values[93]	112	1			T771	1		T792	10		T558	2
values[94]	106	1			T771	2		T792	4		T558	3
values[95]	108	1			T771	1		T792	11		T558	4
values[96]	101	1			T771	4		T792	8		T558	3
values[97]	109	1			T771	2		T792	10		T558	2
values[98]	116	1			T771	1		T792	11		T558	7
values[99]	95	1			T771	1		T792	10		T558	7
values[100]	124	1			T771	3		T792	14		T558	7
values[101]	126	1			T771	6		T792	8		T558	8
values[102]	107	1			T771	2		T792	6		T558	4
values[103]	104	1			T771	2		T792	7		T558	2
values[104]	101	1			T771	1		T792	15		T558	2
values[105]	87	1			T771	2		T792	14		T558	6
values[106]	98	1			T771	6		T792	14		T558	5
values[107]	83	1			T771	1		T792	9		T558	2
values[108]	92	1			T771	4		T792	7		T558	6
values[109]	100	1			T771	1		T792	11		T558	5
values[110]	88	1			T771	2		T792	11		T558	2
values[111]	82	1			T771	3		T792	6		T558	2
values[112]	91	1			T771	4		T792	5		T558	5
values[113]	98	1			T771	1		T792	15		T558	11
values[114]	92	1			T771	6		T792	14		T558	8
values[115]	86	1			T771	2		T792	13		T558	4
values[116]	88	1			T771	1		T792	10		T558	2
values[117]	86	1			T771	2		T792	15		T558	3
values[118]	83	1			T771	1		T792	22		T558	3
values[119]	87	1			T771	2		T792	15		T558	6
values[120]	96	1			T771	3		T792	11		T558	4
values[121]	89	1			T771	3		T792	7		T558	2
values[122]	84	1			T771	1		T792	14		T558	3
values[123]	85	1			T771	1		T792	10		T558	4
values[124]	92	1			T771	3		T792	7		T558	6
values[125]	107	1			T771	1		T792	5		T558	5
values[126]	185	1			T771	1		T792	1		T558	6
values[127]	839	1			T771	29		T792	5		T558	20
values[128]	5352	1			T771	300		T792	6		T558	10