Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c2_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141904	1			T77	217		T82	14		T84	6
values[2]	9781	1			T83	6		T452	1		T564	1
values[3]	3641	1			T551	2		T553	89		T836	1
values[4]	2005	1			T551	1		T553	67		T836	1
values[5]	1317	1			T551	1		T553	32		T836	1
values[6]	854	1			T551	5		T553	12		T836	1
values[7]	583	1			T551	2		T553	4		T836	1
values[8]	462	1			T551	2		T553	11		T836	1
values[9]	388	1			T551	4		T553	6		T836	1
values[10]	320	1			T551	6		T836	1		T831	1
values[11]	256	1			T551	3		T836	1		T831	1
values[12]	282	1			T551	1		T836	1		T831	1
values[13]	216	1			T551	1		T836	1		T831	1
values[14]	248	1			T551	8		T836	1		T831	1
values[15]	240	1			T551	4		T836	1		T831	1
values[16]	245	1			T551	10		T836	1		T831	1
values[17]	250	1			T551	8		T836	1		T831	1
values[18]	274	1			T551	11		T836	1		T831	1
values[19]	279	1			T551	8		T836	1		T831	1
values[20]	280	1			T551	4		T836	1		T831	1
values[21]	252	1			T551	2		T836	1		T831	1
values[22]	324	1			T551	5		T836	1		T831	1
values[23]	223	1			T551	1		T836	1		T831	1
values[24]	236	1			T551	4		T836	1		T831	1
values[25]	231	1			T551	11		T836	1		T831	1
values[26]	236	1			T551	16		T836	1		T831	1
values[27]	239	1			T551	13		T836	1		T831	1
values[28]	234	1			T551	16		T836	1		T831	1
values[29]	248	1			T551	2		T836	1		T831	1
values[30]	279	1			T551	5		T836	1		T831	1
values[31]	239	1			T551	12		T836	1		T831	1
values[32]	227	1			T551	1		T836	1		T831	1
values[33]	233	1			T551	7		T836	1		T831	1
values[34]	247	1			T551	2		T836	1		T831	1
values[35]	229	1			T551	2		T836	1		T831	1
values[36]	229	1			T551	1		T836	1		T831	1
values[37]	254	1			T551	7		T836	1		T831	1
values[38]	222	1			T551	2		T836	1		T831	1
values[39]	244	1			T551	4		T836	1		T831	1
values[40]	261	1			T551	4		T836	1		T831	1
values[41]	224	1			T551	2		T836	1		T831	1
values[42]	194	1			T551	3		T836	1		T831	1
values[43]	220	1			T551	1		T836	1		T831	1
values[44]	232	1			T551	1		T836	1		T831	1
values[45]	221	1			T551	1		T836	1		T831	1
values[46]	199	1			T551	3		T836	1		T831	1
values[47]	192	1			T551	1		T836	1		T831	1
values[48]	186	1			T551	1		T836	1		T831	1
values[49]	201	1			T551	5		T836	1		T831	1
values[50]	243	1			T551	2		T836	1		T831	1
values[51]	210	1			T551	2		T836	1		T831	1
values[52]	192	1			T551	2		T836	1		T831	1
values[53]	211	1			T551	1		T836	1		T831	1
values[54]	220	1			T551	2		T836	1		T831	1
values[55]	211	1			T551	3		T836	1		T831	1
values[56]	209	1			T551	2		T836	1		T831	1
values[57]	204	1			T551	5		T836	1		T831	1
values[58]	183	1			T551	1		T836	1		T831	1
values[59]	172	1			T551	2		T836	1		T831	1
values[60]	179	1			T551	5		T836	1		T831	1
values[61]	162	1			T551	3		T836	1		T831	1
values[62]	166	1			T551	2		T836	1		T831	1
values[63]	150	1			T551	2		T836	1		T831	1
values[64]	174	1			T551	6		T836	1		T831	1
values[65]	193	1			T551	3		T836	1		T831	1
values[66]	128	1			T551	3		T836	1		T831	1
values[67]	169	1			T551	15		T836	1		T831	1
values[68]	120	1			T551	2		T836	1		T831	1
values[69]	143	1			T551	1		T836	1		T831	1
values[70]	122	1			T551	6		T836	1		T831	1
values[71]	119	1			T551	3		T836	1		T831	1
values[72]	95	1			T551	3		T836	1		T831	1
values[73]	74	1			T551	1		T836	1		T831	1
values[74]	81	1			T551	2		T836	1		T831	1
values[75]	83	1			T551	2		T836	1		T831	1
values[76]	65	1			T551	1		T836	1		T831	1
values[77]	69	1			T551	2		T836	1		T831	1
values[78]	56	1			T551	2		T836	1		T831	1
values[79]	65	1			T551	1		T836	1		T831	1
values[80]	66	1			T551	1		T836	1		T831	1
values[81]	70	1			T551	2		T836	1		T831	1
values[82]	55	1			T551	1		T836	1		T831	1
values[83]	74	1			T551	10		T836	1		T831	1
values[84]	67	1			T551	3		T836	1		T831	1
values[85]	56	1			T551	1		T836	2		T831	1
values[86]	53	1			T551	1		T836	1		T831	1
values[87]	71	1			T551	1		T836	1		T831	1
values[88]	74	1			T551	7		T836	1		T831	1
values[89]	64	1			T551	1		T836	1		T831	1
values[90]	48	1			T551	1		T836	1		T831	1
values[91]	65	1			T551	3		T836	1		T831	1
values[92]	50	1			T551	2		T836	1		T831	1
values[93]	71	1			T551	2		T836	1		T831	1
values[94]	72	1			T551	1		T836	1		T831	1
values[95]	63	1			T551	1		T836	1		T831	1
values[96]	54	1			T551	2		T836	1		T831	1
values[97]	71	1			T551	2		T836	1		T831	1
values[98]	69	1			T551	5		T836	1		T831	1
values[99]	61	1			T551	8		T836	1		T831	1
values[100]	75	1			T551	5		T836	3		T831	1
values[101]	66	1			T551	1		T836	3		T831	1
values[102]	73	1			T551	1		T836	1		T831	1
values[103]	57	1			T551	2		T836	3		T831	1
values[104]	62	1			T551	9		T836	1		T831	1
values[105]	65	1			T551	2		T836	1		T831	1
values[106]	47	1			T551	5		T836	1		T831	2
values[107]	44	1			T551	8		T836	1		T831	1
values[108]	49	1			T551	1		T836	5		T831	1
values[109]	53	1			T551	1		T836	3		T831	1
values[110]	62	1			T551	5		T836	5		T831	1
values[111]	67	1			T551	6		T836	6		T831	1
values[112]	53	1			T551	6		T836	1		T831	1
values[113]	62	1			T551	4		T836	8		T831	1
values[114]	61	1			T551	3		T836	4		T831	1
values[115]	48	1			T551	3		T836	2		T831	1
values[116]	43	1			T551	4		T836	1		T831	1
values[117]	49	1			T551	3		T836	2		T831	3
values[118]	54	1			T551	3		T836	1		T831	1
values[119]	52	1			T551	6		T836	1		T831	1
values[120]	46	1			T551	4		T836	1		T831	2
values[121]	38	1			T551	1		T836	5		T831	1
values[122]	43	1			T551	2		T836	1		T831	1
values[123]	48	1			T551	1		T836	2		T831	1
values[124]	41	1			T836	1		T831	1		T839	2
values[125]	48	1			T836	1		T831	1		T839	3
values[126]	65	1			T836	1		T831	1		T839	8
values[127]	696	1			T836	32		T831	25		T839	25
values[128]	6797	1			T836	296		T831	253		T839	256