Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pwm_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	140434	1			T77	200		T82	8		T84	7
values[2]	9316	1			T77	1		T82	1		T464	1
values[3]	3481	1			T464	1		T565	7		T561	1
values[4]	1902	1			T464	1		T565	2		T561	1
values[5]	1164	1			T464	1		T565	2		T832	1
values[6]	739	1			T464	1		T565	3		T832	1
values[7]	624	1			T464	1		T565	7		T832	1
values[8]	408	1			T464	1		T565	11		T832	1
values[9]	317	1			T464	1		T565	9		T832	2
values[10]	301	1			T464	1		T565	4		T832	1
values[11]	309	1			T464	1		T565	1		T832	1
values[12]	241	1			T464	1		T565	1		T832	1
values[13]	228	1			T464	1		T565	3		T832	1
values[14]	237	1			T464	1		T565	2		T832	1
values[15]	244	1			T464	1		T565	7		T832	1
values[16]	221	1			T464	1		T565	2		T832	1
values[17]	229	1			T464	1		T565	7		T832	1
values[18]	218	1			T464	1		T565	2		T832	1
values[19]	217	1			T464	1		T565	1		T832	1
values[20]	205	1			T464	1		T565	1		T832	1
values[21]	217	1			T464	1		T565	3		T832	1
values[22]	204	1			T464	1		T565	1		T832	1
values[23]	224	1			T464	1		T565	2		T832	1
values[24]	259	1			T464	1		T565	4		T832	1
values[25]	232	1			T464	1		T565	8		T832	1
values[26]	221	1			T464	1		T565	3		T832	1
values[27]	231	1			T464	1		T565	1		T832	1
values[28]	240	1			T464	1		T565	6		T832	1
values[29]	203	1			T464	1		T565	6		T832	1
values[30]	196	1			T464	1		T565	3		T832	1
values[31]	218	1			T464	1		T565	2		T832	1
values[32]	189	1			T464	1		T565	2		T832	1
values[33]	172	1			T464	1		T565	5		T832	1
values[34]	193	1			T464	1		T565	3		T832	1
values[35]	230	1			T464	1		T565	1		T832	1
values[36]	181	1			T464	1		T565	1		T832	1
values[37]	191	1			T464	1		T565	5		T832	1
values[38]	174	1			T464	1		T565	3		T832	1
values[39]	206	1			T464	1		T565	1		T832	1
values[40]	205	1			T464	1		T565	2		T832	1
values[41]	191	1			T464	1		T565	3		T832	1
values[42]	217	1			T464	1		T565	2		T832	1
values[43]	186	1			T464	1		T565	5		T832	1
values[44]	168	1			T464	1		T565	3		T832	1
values[45]	205	1			T464	1		T565	2		T832	1
values[46]	187	1			T464	1		T565	1		T832	1
values[47]	192	1			T464	1		T565	3		T832	1
values[48]	148	1			T464	1		T565	1		T832	1
values[49]	180	1			T464	1		T565	1		T832	1
values[50]	178	1			T464	1		T565	6		T832	1
values[51]	164	1			T464	1		T565	5		T832	1
values[52]	169	1			T464	2		T565	3		T832	1
values[53]	189	1			T464	1		T565	1		T832	1
values[54]	198	1			T464	1		T565	1		T832	1
values[55]	180	1			T464	1		T565	6		T832	2
values[56]	140	1			T464	1		T565	3		T832	1
values[57]	152	1			T464	1		T565	2		T832	1
values[58]	204	1			T464	1		T565	1		T832	1
values[59]	149	1			T464	1		T565	3		T832	1
values[60]	123	1			T464	1		T565	1		T832	1
values[61]	175	1			T464	1		T565	1		T832	1
values[62]	176	1			T464	1		T565	3		T832	1
values[63]	166	1			T464	1		T565	14		T832	1
values[64]	169	1			T464	1		T565	5		T832	1
values[65]	149	1			T464	1		T565	3		T832	1
values[66]	139	1			T464	1		T565	1		T832	1
values[67]	125	1			T464	1		T565	4		T832	1
values[68]	104	1			T464	1		T565	3		T832	1
values[69]	109	1			T464	1		T565	2		T832	1
values[70]	120	1			T464	1		T565	4		T832	1
values[71]	124	1			T464	1		T565	11		T832	1
values[72]	136	1			T464	1		T565	14		T832	1
values[73]	88	1			T464	1		T565	3		T832	1
values[74]	109	1			T464	1		T565	10		T832	1
values[75]	105	1			T464	1		T565	22		T832	1
values[76]	90	1			T464	1		T565	24		T832	1
values[77]	79	1			T464	1		T565	7		T832	1
values[78]	87	1			T464	1		T565	11		T832	1
values[79]	82	1			T464	1		T565	11		T832	1
values[80]	82	1			T464	1		T565	5		T832	1
values[81]	95	1			T464	1		T565	17		T832	1
values[82]	90	1			T464	1		T565	8		T832	1
values[83]	67	1			T464	1		T565	4		T832	1
values[84]	72	1			T464	1		T565	6		T832	1
values[85]	93	1			T464	1		T565	8		T832	1
values[86]	70	1			T464	1		T832	1		T502	1
values[87]	70	1			T464	1		T832	1		T502	1
values[88]	82	1			T464	1		T832	1		T502	1
values[89]	86	1			T464	1		T832	1		T502	1
values[90]	77	1			T464	1		T832	1		T502	1
values[91]	66	1			T464	1		T832	1		T502	1
values[92]	62	1			T464	1		T832	1		T502	1
values[93]	93	1			T464	1		T832	1		T502	1
values[94]	79	1			T464	1		T832	1		T502	1
values[95]	84	1			T464	1		T832	1		T502	1
values[96]	101	1			T464	1		T832	1		T502	2
values[97]	89	1			T464	1		T832	1		T502	1
values[98]	86	1			T464	1		T832	2		T502	1
values[99]	97	1			T464	1		T832	1		T502	3
values[100]	80	1			T464	1		T832	1		T502	2
values[101]	89	1			T464	1		T832	1		T502	3
values[102]	84	1			T464	1		T832	1		T502	7
values[103]	100	1			T464	2		T832	1		T502	10
values[104]	70	1			T464	1		T832	1		T502	2
values[105]	68	1			T464	1		T832	1		T502	2
values[106]	53	1			T464	1		T832	1		T502	1
values[107]	70	1			T464	1		T832	1		T502	2
values[108]	76	1			T464	1		T832	1		T502	1
values[109]	56	1			T464	1		T832	1		T502	2
values[110]	49	1			T464	1		T832	1		T502	1
values[111]	56	1			T464	1		T832	1		T502	1
values[112]	71	1			T464	1		T832	1		T502	2
values[113]	62	1			T464	2		T832	1		T502	2
values[114]	61	1			T464	2		T832	1		T502	1
values[115]	58	1			T464	3		T832	1		T502	2
values[116]	70	1			T464	2		T832	1		T502	3
values[117]	56	1			T464	1		T832	3		T502	4
values[118]	53	1			T464	1		T832	1		T502	1
values[119]	70	1			T464	3		T832	1		T502	2
values[120]	53	1			T464	2		T832	1		T502	1
values[121]	47	1			T464	1		T832	2		T502	3
values[122]	56	1			T464	1		T832	4		T502	1
values[123]	49	1			T464	2		T832	1		T502	1
values[124]	41	1			T464	1		T832	2		T502	1
values[125]	42	1			T464	1		T832	4		T502	2
values[126]	85	1			T464	1		T832	2		T502	1
values[127]	567	1			T464	32		T832	32		T502	24
values[128]	5479	1			T464	358		T832	310		T502	262