Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_host1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141838	1			T77	769		T82	11		T84	3
values[2]	7635	1			T77	26		T453	5		T553	112
values[3]	3322	1			T77	18		T553	65		T593	2
values[4]	1988	1			T77	14		T553	26		T710	7
values[5]	1273	1			T77	13		T553	11		T710	7
values[6]	916	1			T77	22		T553	2		T710	11
values[7]	846	1			T77	11		T710	14		T716	14
values[8]	749	1			T77	13		T710	6		T716	8
values[9]	678	1			T77	34		T710	7		T716	12
values[10]	673	1			T77	26		T710	18		T716	10
values[11]	529	1			T77	15		T710	8		T716	8
values[12]	624	1			T77	27		T710	15		T716	3
values[13]	532	1			T77	23		T710	18		T716	9
values[14]	549	1			T77	31		T710	10		T716	12
values[15]	581	1			T77	14		T710	6		T716	13
values[16]	526	1			T77	15		T710	12		T716	3
values[17]	620	1			T77	14		T710	7		T502	1
values[18]	530	1			T77	17		T710	6		T502	1
values[19]	531	1			T77	29		T710	16		T502	1
values[20]	457	1			T77	12		T710	14		T502	1
values[21]	474	1			T77	7		T710	7		T502	1
values[22]	458	1			T77	11		T710	6		T502	1
values[23]	506	1			T77	5		T710	8		T502	1
values[24]	512	1			T77	22		T710	32		T502	1
values[25]	538	1			T77	19		T710	6		T502	1
values[26]	597	1			T77	8		T710	14		T502	1
values[27]	468	1			T77	4		T710	10		T502	1
values[28]	469	1			T77	16		T710	8		T502	1
values[29]	426	1			T77	7		T710	8		T502	1
values[30]	378	1			T77	8		T710	7		T502	1
values[31]	387	1			T77	10		T710	3		T502	1
values[32]	367	1			T77	8		T710	10		T502	1
values[33]	333	1			T710	17		T502	1		T581	3
values[34]	432	1			T710	22		T502	1		T581	4
values[35]	414	1			T710	12		T502	1		T581	5
values[36]	363	1			T710	7		T502	1		T581	6
values[37]	378	1			T710	7		T502	1		T581	2
values[38]	381	1			T710	15		T502	1		T581	1
values[39]	345	1			T502	1		T581	2		T839	1
values[40]	356	1			T502	1		T581	2		T839	1
values[41]	376	1			T502	1		T581	6		T839	1
values[42]	277	1			T502	1		T581	2		T839	1
values[43]	287	1			T502	1		T581	1		T839	1
values[44]	250	1			T502	1		T581	4		T839	1
values[45]	256	1			T502	1		T581	1		T839	1
values[46]	200	1			T502	1		T581	3		T839	1
values[47]	235	1			T502	1		T581	1		T839	1
values[48]	214	1			T502	1		T581	3		T839	2
values[49]	209	1			T502	1		T581	6		T839	1
values[50]	215	1			T502	1		T581	5		T839	1
values[51]	164	1			T502	1		T581	2		T839	1
values[52]	196	1			T502	1		T581	1		T839	1
values[53]	130	1			T502	1		T581	5		T839	1
values[54]	103	1			T502	1		T581	1		T839	1
values[55]	83	1			T502	1		T581	2		T839	1
values[56]	64	1			T502	1		T581	2		T839	1
values[57]	70	1			T502	1		T581	6		T839	1
values[58]	89	1			T502	1		T581	4		T839	1
values[59]	66	1			T502	1		T581	3		T839	1
values[60]	76	1			T502	1		T581	2		T839	1
values[61]	73	1			T502	1		T581	2		T839	1
values[62]	78	1			T502	1		T581	1		T839	1
values[63]	76	1			T502	1		T581	8		T839	1
values[64]	84	1			T502	1		T581	10		T839	1
values[65]	63	1			T502	1		T581	5		T839	1
values[66]	57	1			T502	1		T581	2		T839	1
values[67]	70	1			T502	1		T581	2		T839	1
values[68]	65	1			T502	1		T581	1		T839	1
values[69]	59	1			T502	1		T581	2		T839	1
values[70]	62	1			T502	1		T581	6		T839	1
values[71]	73	1			T502	1		T581	6		T839	1
values[72]	91	1			T502	1		T581	10		T839	1
values[73]	65	1			T502	1		T581	6		T839	1
values[74]	86	1			T502	1		T581	5		T839	1
values[75]	82	1			T502	1		T581	3		T839	1
values[76]	65	1			T502	1		T581	1		T839	1
values[77]	80	1			T502	1		T581	4		T839	1
values[78]	73	1			T502	1		T581	4		T839	1
values[79]	68	1			T502	1		T581	3		T839	1
values[80]	88	1			T502	1		T581	11		T839	1
values[81]	71	1			T502	1		T581	2		T839	1
values[82]	88	1			T502	1		T581	6		T839	1
values[83]	88	1			T502	1		T581	2		T839	1
values[84]	92	1			T502	1		T581	4		T839	1
values[85]	59	1			T502	1		T581	2		T839	1
values[86]	52	1			T502	1		T581	6		T839	1
values[87]	41	1			T502	1		T581	4		T839	1
values[88]	44	1			T502	1		T581	4		T839	1
values[89]	56	1			T502	1		T581	11		T839	1
values[90]	53	1			T502	1		T581	14		T839	1
values[91]	52	1			T502	1		T581	11		T839	1
values[92]	50	1			T502	1		T581	6		T839	1
values[93]	50	1			T502	1		T581	4		T839	1
values[94]	58	1			T502	1		T581	4		T839	1
values[95]	65	1			T502	1		T581	1		T839	1
values[96]	65	1			T502	1		T581	1		T839	1
values[97]	49	1			T502	1		T839	1		T834	1
values[98]	43	1			T502	1		T839	1		T834	1
values[99]	47	1			T502	1		T839	1		T834	1
values[100]	44	1			T502	1		T839	1		T834	1
values[101]	48	1			T502	1		T839	1		T834	1
values[102]	64	1			T502	1		T839	1		T834	1
values[103]	44	1			T502	1		T839	1		T834	1
values[104]	53	1			T502	1		T839	1		T834	1
values[105]	51	1			T502	3		T839	1		T834	1
values[106]	38	1			T502	1		T839	1		T834	3
values[107]	63	1			T502	1		T839	1		T834	4
values[108]	72	1			T502	1		T839	1		T834	4
values[109]	49	1			T502	3		T839	1		T834	5
values[110]	48	1			T502	3		T839	1		T834	1
values[111]	48	1			T502	1		T839	1		T834	2
values[112]	35	1			T502	1		T839	1		T834	1
values[113]	35	1			T502	2		T839	1		T834	1
values[114]	29	1			T502	1		T839	1		T834	2
values[115]	32	1			T502	1		T839	1		T834	3
values[116]	37	1			T502	2		T839	2		T834	1
values[117]	42	1			T502	1		T839	9		T834	4
values[118]	54	1			T502	10		T839	2		T834	1
values[119]	47	1			T502	4		T839	1		T834	3
values[120]	46	1			T502	5		T839	1		T834	2
values[121]	37	1			T502	2		T839	1		T834	1
values[122]	38	1			T502	1		T839	1		T834	1
values[123]	43	1			T502	1		T839	1		T834	2
values[124]	52	1			T502	1		T839	3		T834	1
values[125]	37	1			T502	1		T839	2		T834	1
values[126]	86	1			T502	3		T839	4		T834	1
values[127]	1034	1			T502	52		T839	55		T834	62
values[128]	4771	1			T502	268		T839	300		T834	252